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Message-ID: <ad39d430-2d11-e74f-e0a6-20ec08d13b0b@microchip.com>
Date:   Mon, 15 Aug 2022 19:42:49 +0000
From:   <Conor.Dooley@...rochip.com>
To:     <prabhakar.csengg@...il.com>, <Conor.Dooley@...rochip.com>
CC:     <prabhakar.mahadev-lad.rj@...renesas.com>, <robh+dt@...nel.org>,
        <krzysztof.kozlowski+dt@...aro.org>, <paul.walmsley@...ive.com>,
        <palmer@...belt.com>, <aou@...s.berkeley.edu>,
        <geert+renesas@...der.be>, <anup@...infault.org>,
        <linux-renesas-soc@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-riscv@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
        <biju.das.jz@...renesas.com>
Subject: Re: [PATCH v2 3/8] dt-bindings: soc: renesas: renesas.yaml: Document
 Renesas RZ/Five SoC

On 15/08/2022 20:40, Lad, Prabhakar wrote:
> Hi Conor,
> 
> Thank you for the review.
> 
> On Mon, Aug 15, 2022 at 8:14 PM <Conor.Dooley@...rochip.com> wrote:
>>
>> On 15/08/2022 16:14, Lad Prabhakar wrote:
>>> dt-bindings: soc: renesas: renesas.yaml: Document Renesas RZ/Five SoC
>>
>> Hey Lad,
>>
>> Maybe I am missing something on the arm side, but "soc"?
>> Was the intent to move this to Documentation/devicetree/bindings/soc
>> but you moved it back to arm by accident?
>>
> Ouch I sent out the older version of my patch for this. I did actually
> send out a patch which moves arm renesas.yaml to the soc folder.

Cool thought I saw one of those this morning.

> 
> Cheers,
> Prabhakar
> 
>> Thanks,
>> Conor.
>>
>>
>>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>>
>>> Document Renesas RZ/Five (R9A07G043) SoC.
>>>
>>> More info about RZ/Five SoC:
>>> https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-mpus/rzfive-risc-v-general-purpose-microprocessors-risc-v-cpu-core-andes-ax45mp-single-10-ghz-2ch-gigabit-ethernet
>>>
>>> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
>>> ---
>>> v1->v2
>>> * New patch
>>> ---
>>>  Documentation/devicetree/bindings/arm/renesas.yaml | 3 ++-
>>>  1 file changed, 2 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/arm/renesas.yaml b/Documentation/devicetree/bindings/arm/renesas.yaml
>>> index ff80152f092f..233847eb23fd 100644
>>> --- a/Documentation/devicetree/bindings/arm/renesas.yaml
>>> +++ b/Documentation/devicetree/bindings/arm/renesas.yaml
>>> @@ -415,11 +415,12 @@ properties:
>>>                - renesas,rzn1d400-db # RZN1D-DB (RZ/N1D Demo Board for the RZ/N1D 400 pins package)
>>>            - const: renesas,r9a06g032
>>>
>>> -      - description: RZ/G2UL (R9A07G043)
>>> +      - description: RZ/Five and RZ/G2UL (R9A07G043)
>>>          items:
>>>            - enum:
>>>                - renesas,smarc-evk # SMARC EVK
>>>            - enum:
>>> +              - renesas,r9a07g043f01 # RZ/Five (RISC-V core)
>>>                - renesas,r9a07g043u11 # RZ/G2UL Type-1
>>>                - renesas,r9a07g043u12 # RZ/G2UL Type-2
>>>            - const: renesas,r9a07g043
>>> --
>>> 2.25.1
>>>
>>
> 
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> linux-riscv mailing list
> linux-riscv@...ts.infradead.org
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