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Message-ID: <CA+V-a8utT6UE=rc62LPE=UoU0DTJ2dDt7KO9UJ1vAG9r80E2pg@mail.gmail.com>
Date: Mon, 15 Aug 2022 20:57:57 +0100
From: "Lad, Prabhakar" <prabhakar.csengg@...il.com>
To: Conor.Dooley@...rochip.com
Cc: "Lad, Prabhakar" <prabhakar.mahadev-lad.rj@...renesas.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Anup Patel <anup@...infault.org>,
Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
linux-riscv <linux-riscv@...ts.infradead.org>,
LKML <linux-kernel@...r.kernel.org>,
Biju Das <biju.das.jz@...renesas.com>
Subject: Re: [PATCH v2 4/8] RISC-V: Kconfig.socs: Add Renesas RZ/Five SoC
kconfig option
Hi Conor,
Thank you for the review.
On Mon, Aug 15, 2022 at 8:10 PM <Conor.Dooley@...rochip.com> wrote:
>
> On 15/08/2022 16:14, Lad Prabhakar wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> >
> > Introduce SOC_RENESAS_RZFIVE config option to enable Renesas RZ/Five
> > (R9A07G043) SoC, along side also add ARCH_RENESAS config option as most
> > of the Renesas drivers depend on this config option.
>
> Hey Lad,
>
> I think I said something similar on v1, but I said it again
> to Samuel today so I may as well repost here too:
> "I think this and patch 12/12 with the defconfig changes should be
patch 8/8.
> deferred until post LPC (which still leaves plenty of time for
> making the 6.1 merge window). We already have like 4 different
> approaches between the existing SOC_FOO symbols & two more when
> D1 stuff and the Renesas stuff is considered.
>
> Plan is to decide at LPC on one approach for what to do with
> Kconfig.socs & to me it seems like a good idea to do what's being
> done here - it's likely that further arm vendors will move and
> keeping the common symbols makes a lot of sense to me..."
>
Sure not a problem. But delaying patch 4 and 8 will make RZ/Five SoC
not buildable. Is that OK?
> Also, for the sake of my OCD could you pick either riscv or
> RISC-V and use it for the whole series? Pedantic I guess, but
> /shrug
>
Sorry did you mean I add riscv/RISC-V in the subject?
Cheers,
Prabhakar
> Thanks,
> Conor.
>
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> > ---
> > v1->v2
> > * No Change
> > ---
> > arch/riscv/Kconfig.socs | 14 ++++++++++++++
> > 1 file changed, 14 insertions(+)
> >
> > diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> > index 69774bb362d6..91b7f38b77a8 100644
> > --- a/arch/riscv/Kconfig.socs
> > +++ b/arch/riscv/Kconfig.socs
> > @@ -80,4 +80,18 @@ config SOC_CANAAN_K210_DTB_SOURCE
> >
> > endif # SOC_CANAAN
> >
> > +config ARCH_RENESAS
> > + bool
> > + select GPIOLIB
> > + select PINCTRL
> > + select SOC_BUS
> > +
> > +config SOC_RENESAS_RZFIVE
> > + bool "Renesas RZ/Five SoC"
> > + select ARCH_R9A07G043
> > + select ARCH_RENESAS
> > + select RESET_CONTROLLER
> > + help
> > + This enables support for Renesas RZ/Five SoC.
> > +
> > endmenu # "SoC selection"
> > --
> > 2.25.1
> >
>
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