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Message-ID: <b50f554d-d6b0-5947-2557-d81bbfb1c2f9@somainline.org>
Date: Wed, 17 Aug 2022 23:04:58 +0200
From: Konrad Dybcio <konrad.dybcio@...ainline.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Lee Jones <lee@...nel.org>, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [RFT PATCH v2 12/14] arm64: dts: qcom: qcs404: switch TCSR mutex
to MMIO
On 17.08.2022 15:03, Krzysztof Kozlowski wrote:
> The TCSR mutex bindings allow device to be described only with address
> space (so it uses MMIO, not syscon regmap). This seems reasonable as
> TCSR mutex is actually a dedicated IO address space and it also fixes DT
> schema checks:
>
> qcom/qcs404-evb-4000.dtb: hwlock: 'reg' is a required property
> qcom/qcs404-evb-4000.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+'
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> ---
Not tested on a device, but looks good to the eye:
Reviewed-by: Konrad Dybcio <konrad.dybcio@...ainline.org>
Konrad
> arch/arm64/boot/dts/qcom/qcs404.dtsi | 11 +++--------
> 1 file changed, 3 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi
> index 9ab990061522..3a94eb2cc448 100644
> --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
> +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
> @@ -295,12 +295,6 @@ smem {
> hwlocks = <&tcsr_mutex 3>;
> };
>
> - tcsr_mutex: hwlock {
> - compatible = "qcom,tcsr-mutex";
> - syscon = <&tcsr_mutex_regs 0 0x1000>;
> - #hwlock-cells = <1>;
> - };
> -
> soc: soc@0 {
> #address-cells = <1>;
> #size-cells = <1>;
> @@ -726,9 +720,10 @@ gcc: clock-controller@...0000 {
> assigned-clock-rates = <19200000>;
> };
>
> - tcsr_mutex_regs: syscon@...5000 {
> - compatible = "syscon";
> + tcsr_mutex: hwlock@...5000 {
> + compatible = "qcom,tcsr-mutex";
> reg = <0x01905000 0x20000>;
> + #hwlock-cells = <1>;
> };
>
> tcsr: syscon@...7000 {
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