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Message-ID: <0a10f55c-1e91-de8d-74c1-e2778841b7fc@linaro.org>
Date:   Thu, 18 Aug 2022 11:25:37 +0300
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Jiucheng Xu <jiucheng.xu@...ogic.com>,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-amlogic@...ts.infradead.org, devicetree@...r.kernel.org
Cc:     Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Will Deacon <will@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Neil Armstrong <narmstrong@...libre.com>,
        Kevin Hilman <khilman@...libre.com>,
        Jerome Brunet <jbrunet@...libre.com>,
        Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
        Chris Healy <cphealy@...il.com>
Subject: Re: [PATCH v5 3/4] dt-binding: perf: Add Amlogic DDR PMU

On 17/08/2022 14:34, Jiucheng Xu wrote:
> Add binding documentation for the Amlogic G12 series DDR
> performance monitor unit.
> 
> Signed-off-by: Jiucheng Xu <jiucheng.xu@...ogic.com>

(...)

> +
> +  interrupts:
> +    items:
> +      - description: The IRQ of the inside timer timeout.
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    pmu {
> +        #address-cells=<2>;
> +        #size-cells=<2>;
> +
> +        pmu@...38000 {
> +

No need for blank line.

> +            compatible = "amlogic,g12a-ddr-pmu";
> +            reg = <0x0 0xff638000 0x0 0x100>,
> +                  <0x0 0xff638c00 0x0 0x100>;
> +            interrupts = <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>;
> +        };
> +    };

With above fixed:

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>


Best regards,
Krzysztof

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