linux-kernel - Re: [PATCH v5 1/4] perf/amlogic: Add support for Amlogic meson G12 SoC DDR PMU driver

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Message-ID: <188425fd-8cc7-fb2e-9ee3-ff37937cac54@linaro.org>
Date:   Thu, 18 Aug 2022 11:30:20 +0300
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Jiucheng Xu <jiucheng.xu@...ogic.com>,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-amlogic@...ts.infradead.org, devicetree@...r.kernel.org
Cc:     Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Will Deacon <will@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Neil Armstrong <narmstrong@...libre.com>,
        Kevin Hilman <khilman@...libre.com>,
        Jerome Brunet <jbrunet@...libre.com>,
        Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
        Chris Healy <cphealy@...il.com>,
        kernel test robot <lkp@...el.com>
Subject: Re: [PATCH v5 1/4] perf/amlogic: Add support for Amlogic meson G12
 SoC DDR PMU driver

On 17/08/2022 14:34, Jiucheng Xu wrote:
> This patch adds support Amlogic meson G12 series SoC
> DDR bandwidth PMU driver framework and interfaces.
> 
> The PMU not only can monitor the total DDR bandwidth,
> but also the bandwidth which is from individual IP module.
> 
> Example usage:

Thank you for your patch. There is something to discuss/improve.

}
> +
> +static int dmc_g12_irq_handler(struct dmc_info *info,
> +			       struct dmc_counter *counter)
> +{
> +	unsigned int val;
> +	int ret = -EINVAL;
> +
> +	val = readl(info->ddr_reg[0] + DMC_MON_G12_CTRL0);
> +	if (val & DMC_QOS_IRQ) {
> +		dmc_g12_get_counters(info, counter);
> +		/* clear irq flags */
> +		writel(val, info->ddr_reg[0] + DMC_MON_G12_CTRL0);
> +		ret = 0;
> +	}
> +	return ret;
> +}
> +
> +static struct dmc_hw_info g12a_dmc_info = {

This and other ones should be also const.

> +	.enable		= dmc_g12_counter_enable,
> +	.disable	= dmc_g12_counter_disable,
> +	.irq_handler	= dmc_g12_irq_handler,
> +	.get_counters	= dmc_g12_get_counters,
> +	.set_axi_filter	= dmc_g12_set_axi_filter,
> +
> +	.dmc_nr = 1,
> +	.chann_nr = 4,
> +	.capability = 0X7EFF00FF03DF,
> +	.fmt_attr = g12_pmu_format_attrs,
> +};
> +

Best regards,
Krzysztof