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Message-ID: <AS8PR04MB8676D575ED7FD81B0451BD028C6D9@AS8PR04MB8676.eurprd04.prod.outlook.com>
Date: Thu, 18 Aug 2022 10:53:55 +0000
From: Hongxing Zhu <hongxing.zhu@....com>
To: Marek Vasut <marex@...x.de>,
"p.zabel@...gutronix.de" <p.zabel@...gutronix.de>,
"l.stach@...gutronix.de" <l.stach@...gutronix.de>,
"bhelgaas@...gle.com" <bhelgaas@...gle.com>,
"lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>,
"robh@...nel.org" <robh@...nel.org>,
"shawnguo@...nel.org" <shawnguo@...nel.org>,
"vkoul@...nel.org" <vkoul@...nel.org>,
"alexander.stein@...tq-group.com" <alexander.stein@...tq-group.com>
CC: "linux-phy@...ts.infradead.org" <linux-phy@...ts.infradead.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"kernel@...gutronix.de" <kernel@...gutronix.de>,
dl-linux-imx <linux-imx@....com>
Subject: RE: [PATCH v3 0/6] Add the iMX8MP PCIe support
> -----Original Message-----
> From: Marek Vasut <marex@...x.de>
> Sent: 2022年8月18日 17:20
> To: Hongxing Zhu <hongxing.zhu@....com>; p.zabel@...gutronix.de;
> l.stach@...gutronix.de; bhelgaas@...gle.com; lorenzo.pieralisi@....com;
> robh@...nel.org; shawnguo@...nel.org; vkoul@...nel.org;
> alexander.stein@...tq-group.com
> Cc: linux-phy@...ts.infradead.org; devicetree@...r.kernel.org;
> linux-pci@...r.kernel.org; linux-arm-kernel@...ts.infradead.org;
> linux-kernel@...r.kernel.org; kernel@...gutronix.de; dl-linux-imx
> <linux-imx@....com>
> Subject: Re: [PATCH v3 0/6] Add the iMX8MP PCIe support
>
> On 8/18/22 09:02, Richard Zhu wrote:
> > Based on the 6.0-rc1 of the pci/next branch.
> > This series adds the i.MX8MP PCIe support and had been tested on
> > i.MX8MP EVK board when one PCIe NVME device is used.
> >
> > - i.MX8MP PCIe has reversed initial PERST bit value refer to
> i.MX8MQ/i.MX8MM.
> > Add the PHY PERST explicitly for i.MX8MP PCIe PHY.
> > - Add the i.MX8MP PCIe PHY support in the i.MX8M PCIe PHY driver.
> > And share as much as possible codes with i.MX8MM PCIe PHY.
> > - Add the i.MX8MP PCIe support in binding document, DTS files, and PCIe
> > driver.
> >
> > Main changes v2-->v3:
> > - Fix the schema checking error in the PHY dt-binding patch.
> > - Inspired by Lucas, the PLL configurations might not required when
> > external OSC is used as PCIe referrence clock. It's true. Remove all
> > the HSIO PLL bit manipulations, and PCIe works fine on i.MX8MP EVK
> board
> > with one NVME device is used.
> > - Drop the #4 patch of v2, since it had been applied by Rob.
> >
> > Main changes v1-->v2:
> > - It's my fault forget including Vinod, re-send v2 after include Vinod
> > and linux-phy@...ts.infradead.org.
> > - List the basements of this patch-set. The branch, codes changes and so on.
> > - Clean up some useless register and bit definitions in #3 patch.
> >
> > Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml | 16
> +++++++--
> > arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 53
> +++++++++++++++++++++++++++++
> > arch/arm64/boot/dts/freescale/imx8mp.dtsi | 46
> ++++++++++++++++++++++++-
> > drivers/pci/controller/dwc/pci-imx6.c | 17
> +++++++++-
> > drivers/phy/freescale/phy-fsl-imx8m-pcie.c | 150
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++-------
> ------------------
> > drivers/reset/reset-imx7.c | 1 +
> > 6 files changed, 232 insertions(+), 51 deletions(-)
>
> For the entire series:
>
> Tested-by: Marek Vasut <marex@...x.de>
>
Hi Marek:
Thanks for your kindly help to test it.
Best Regards
Richard Zhu
> Thanks !
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