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Message-ID: <Yv9OGVc+WpoDAB0X@worktop.programming.kicks-ass.net>
Date: Fri, 19 Aug 2022 10:47:21 +0200
From: Peter Zijlstra <peterz@...radead.org>
To: Ben Hutchings <ben@...adent.org.uk>
Cc: x86@...nel.org, linux-kernel@...r.kernel.org,
1017425@...s.debian.org,
Martin-Éric Racine <martin-eric.racine@....fi>,
stable@...r.kernel.org, regressions@...ts.linux.dev,
Daniel Sneddon <daniel.sneddon@...ux.intel.com>,
Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>
Subject: Re: [PATCH] x86/speculation: Avoid LFENCE in FILL_RETURN_BUFFER on
CPUs that lack it
On Fri, Aug 19, 2022 at 02:33:08AM +0200, Ben Hutchings wrote:
> From: Ben Hutchings <benh@...ian.org>
>
> The mitigation for PBRSB includes adding LFENCE instructions to the
> RSB filling sequence. However, RSB filling is done on some older CPUs
> that don't support the LFENCE instruction.
>
Wait; what? There are chips that enable the RSB mitigations and DONT
have LFENCE ?!?
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