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Message-ID: <ec787d70-8d8a-c601-3282-a34329b078c4@huawei.com>
Date:   Wed, 24 Aug 2022 17:43:01 +0800
From:   Kefeng Wang <wangkefeng.wang@...wei.com>
To:     Yicong Yang <yangyicong@...wei.com>, <akpm@...ux-foundation.org>,
        <linux-mm@...ck.org>, <linux-arm-kernel@...ts.infradead.org>,
        <x86@...nel.org>, <catalin.marinas@....com>, <will@...nel.org>,
        <linux-doc@...r.kernel.org>
CC:     <corbet@....net>, <peterz@...radead.org>, <arnd@...db.de>,
        <linux-kernel@...r.kernel.org>, <darren@...amperecomputing.com>,
        <yangyicong@...ilicon.com>, <huzhanyuan@...o.com>,
        <lipeifeng@...o.com>, <zhangshiming@...o.com>, <guojian@...o.com>,
        <realmz6@...il.com>, <linux-mips@...r.kernel.org>,
        <openrisc@...ts.librecores.org>, <linuxppc-dev@...ts.ozlabs.org>,
        <linux-riscv@...ts.infradead.org>, <linux-s390@...r.kernel.org>,
        Barry Song <21cnbao@...il.com>, <xhao@...ux.alibaba.com>,
        <prime.zeng@...ilicon.com>, <anshuman.khandual@....com>,
        Barry Song <v-songbaohua@...o.com>,
        "Thomas Gleixner" <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>,
        "Borislav Petkov" <bp@...en8.de>,
        Dave Hansen <dave.hansen@...ux.intel.com>,
        "H. Peter Anvin" <hpa@...or.com>, Nadav Amit <namit@...are.com>,
        Mel Gorman <mgorman@...e.de>
Subject: Re: [PATCH v3 3/4] mm: rmap: Extend tlbbatch APIs to fit new
 platforms


On 2022/8/22 16:21, Yicong Yang wrote:
> From: Barry Song <v-songbaohua@...o.com>
>
> Add uaddr to tlbbatch APIs so that platforms like ARM64 are
> able to apply this on their specific hardware features. For
> ARM64, this could be sending tlbi into hardware queues for
> the page with this particular uaddr.
>
> Cc: Thomas Gleixner <tglx@...utronix.de>
> Cc: Ingo Molnar <mingo@...hat.com>
> Cc: Borislav Petkov <bp@...en8.de>
> Cc: Dave Hansen <dave.hansen@...ux.intel.com>
> Cc: "H. Peter Anvin" <hpa@...or.com>
> Cc: Nadav Amit <namit@...are.com>
> Cc: Mel Gorman <mgorman@...e.de>
> Tested-by: Xin Hao <xhao@...ux.alibaba.com>
> Signed-off-by: Barry Song <v-songbaohua@...o.com>
> Signed-off-by: Yicong Yang <yangyicong@...ilicon.com>
Reviewed-by: Kefeng Wang <wangkefeng.wang@...wei.com>
> ---
>   arch/x86/include/asm/tlbflush.h |  3 ++-
>   mm/rmap.c                       | 10 ++++++----
>   2 files changed, 8 insertions(+), 5 deletions(-)
>
> diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
> index 8a497d902c16..5bd78ae55cd4 100644
> --- a/arch/x86/include/asm/tlbflush.h
> +++ b/arch/x86/include/asm/tlbflush.h
> @@ -264,7 +264,8 @@ static inline u64 inc_mm_tlb_gen(struct mm_struct *mm)
>   }
>   
>   static inline void arch_tlbbatch_add_mm(struct arch_tlbflush_unmap_batch *batch,
> -					struct mm_struct *mm)
> +					struct mm_struct *mm,
> +					unsigned long uaddr)
>   {
>   	inc_mm_tlb_gen(mm);
>   	cpumask_or(&batch->cpumask, &batch->cpumask, mm_cpumask(mm));
> diff --git a/mm/rmap.c b/mm/rmap.c
> index a17a004550c6..7187a72b63b1 100644
> --- a/mm/rmap.c
> +++ b/mm/rmap.c
> @@ -642,12 +642,13 @@ void try_to_unmap_flush_dirty(void)
>   #define TLB_FLUSH_BATCH_PENDING_LARGE			\
>   	(TLB_FLUSH_BATCH_PENDING_MASK / 2)
>   
> -static void set_tlb_ubc_flush_pending(struct mm_struct *mm, bool writable)
> +static void set_tlb_ubc_flush_pending(struct mm_struct *mm, bool writable,
> +				      unsigned long uaddr)
>   {
>   	struct tlbflush_unmap_batch *tlb_ubc = &current->tlb_ubc;
>   	int batch, nbatch;
>   
> -	arch_tlbbatch_add_mm(&tlb_ubc->arch, mm);
> +	arch_tlbbatch_add_mm(&tlb_ubc->arch, mm, uaddr);
>   	tlb_ubc->flush_required = true;
>   
>   	/*
> @@ -725,7 +726,8 @@ void flush_tlb_batched_pending(struct mm_struct *mm)
>   	}
>   }
>   #else
> -static void set_tlb_ubc_flush_pending(struct mm_struct *mm, bool writable)
> +static void set_tlb_ubc_flush_pending(struct mm_struct *mm, bool writable,
> +				      unsigned long uaddr)
>   {
>   }
>   
> @@ -1587,7 +1589,7 @@ static bool try_to_unmap_one(struct folio *folio, struct vm_area_struct *vma,
>   				 */
>   				pteval = ptep_get_and_clear(mm, address, pvmw.pte);
>   
> -				set_tlb_ubc_flush_pending(mm, pte_dirty(pteval));
> +				set_tlb_ubc_flush_pending(mm, pte_dirty(pteval), address);
>   			} else {
>   				pteval = ptep_clear_flush(vma, address, pvmw.pte);
>   			}

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