linux-kernel - Re: [PATCH v5 1/5] gpio-f7188x: Add GPIO support for Nuvoton NCT6116

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20220825113203.4e14f4d5@md1za8fc.ad001.siemens.net>
Date:   Thu, 25 Aug 2022 11:32:03 +0200
From:   Henning Schild <henning.schild@...mens.com>
To:     Andy Shevchenko <andy.shevchenko@...il.com>
Cc:     Linus Walleij <linus.walleij@...aro.org>,
        Bartosz Golaszewski <brgl@...ev.pl>,
        Pavel Machek <pavel@....cz>,
        Hans de Goede <hdegoede@...hat.com>,
        Mark Gross <markgross@...nel.org>,
        Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
        Lee Jones <lee@...nel.org>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Linux LED Subsystem <linux-leds@...r.kernel.org>,
        Platform Driver <platform-driver-x86@...r.kernel.org>,
        Sheng-Yuan Huang <syhuang3@...oton.com>,
        Tasanakorn Phaipool <tasanakorn@...il.com>,
        simon.guinot@...uanux.org
Subject: Re: [PATCH v5 1/5] gpio-f7188x: Add GPIO support for Nuvoton
 NCT6116

Am Wed, 24 Aug 2022 18:59:17 +0300
schrieb Andy Shevchenko <andy.shevchenko@...il.com>:

> On Wed, Aug 24, 2022 at 5:04 PM Henning Schild
> <henning.schild@...mens.com> wrote:
> >
> > Add GPIO support for Nuvoton NCT6116 chip. Nuvoton SuperIO chips are
> > very similar to the ones from Fintek. In other subsystems they also
> > share drivers and are called a family of drivers.
> >
> > For the GPIO subsystem the only difference is that the direction
> > bit is reversed and that there is only one data bit per pin. On the
> > SuperIO level the logical device is another one.
> >
> > On a chip level we do not have a manufacturer ID to check and also
> > no revision.  
> 
> ...
> 
> > +#define gpio_dir_invert(type)  ((type) == nct6116d)
> > +#define gpio_data_single(type) ((type) == nct6116d)  
> 
> What you are trying to do here is to put GPIO maintainers / heavy
> contributors on a minefield (basically moving your job to their
> shoulders). Please, provide a proper namespace and not gpio_ one. I'm
> talking in my "GPIO heavy contributor" hat on.

No i was trying to avoid having to touch those other 4 existing macros,
touching lines that checkpatch.pl and you will pick on again. Adding
the prefixes just to those new ones would be inconsistent and also not
nice.

> With that fixed I can survive w/o pr_fmt() being in this patch. If you
> are going to address this, you may add my tag in a new version.

It is a bit unfortunate that you seem to be surprised where i said i
was going to not address this. And once the new series comes insist on
another round ... which involves testing and what not.

But hey, i will send a v6 with style refactoring patches and test it
all over again.

Thanks everyone for the review, i hope that next version will be
acceptable and not open new discussion with the new patches coming.

regards,
Henning