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Message-ID: <YwjfKsvKyXLdCJ/Z@nvidia.com>
Date: Fri, 26 Aug 2022 11:56:42 -0300
From: Jason Gunthorpe <jgg@...dia.com>
To: Lu Baolu <baolu.lu@...ux.intel.com>
Cc: Joerg Roedel <joro@...tes.org>,
Christoph Hellwig <hch@...radead.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Kevin Tian <kevin.tian@...el.com>,
Ashok Raj <ashok.raj@...el.com>, Will Deacon <will@...nel.org>,
Robin Murphy <robin.murphy@....com>,
Jean-Philippe Brucker <jean-philippe@...aro.com>,
Dave Jiang <dave.jiang@...el.com>,
Fenghua Yu <fenghua.yu@...el.com>,
Vinod Koul <vkoul@...nel.org>,
Eric Auger <eric.auger@...hat.com>,
Liu Yi L <yi.l.liu@...el.com>,
Jacob jun Pan <jacob.jun.pan@...el.com>,
Zhangfei Gao <zhangfei.gao@...aro.org>,
Zhu Tony <tony.zhu@...el.com>, iommu@...ts.linux.dev,
linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
Jean-Philippe Brucker <jean-philippe@...aro.org>
Subject: Re: [PATCH v12 12/17] arm-smmu-v3/sva: Add SVA domain support
On Fri, Aug 26, 2022 at 08:11:36PM +0800, Lu Baolu wrote:
> +static const struct iommu_domain_ops arm_smmu_sva_domain_ops = {
> + .set_dev_pasid = arm_smmu_sva_set_dev_pasid,
Do we want to permit drivers to not allow a SVA domain to be set on a
RID?
It seems like a weird restriction to me
Jason
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