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Message-ID: <Ywjr0rolwfdiaFSC@nvidia.com>
Date:   Fri, 26 Aug 2022 12:50:42 -0300
From:   Jason Gunthorpe <jgg@...dia.com>
To:     Lu Baolu <baolu.lu@...ux.intel.com>
Cc:     Joerg Roedel <joro@...tes.org>,
        Christoph Hellwig <hch@...radead.org>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Kevin Tian <kevin.tian@...el.com>,
        Ashok Raj <ashok.raj@...el.com>, Will Deacon <will@...nel.org>,
        Robin Murphy <robin.murphy@....com>,
        Jean-Philippe Brucker <jean-philippe@...aro.com>,
        Dave Jiang <dave.jiang@...el.com>,
        Fenghua Yu <fenghua.yu@...el.com>,
        Vinod Koul <vkoul@...nel.org>,
        Eric Auger <eric.auger@...hat.com>,
        Liu Yi L <yi.l.liu@...el.com>,
        Jacob jun Pan <jacob.jun.pan@...el.com>,
        Zhangfei Gao <zhangfei.gao@...aro.org>,
        Zhu Tony <tony.zhu@...el.com>, iommu@...ts.linux.dev,
        linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v12 00/17] iommu: SVA and IOPF refactoring

On Fri, Aug 26, 2022 at 08:11:24PM +0800, Lu Baolu wrote:
> Hi folks,
> 
> The former part of this series introduces the IOMMU interfaces to attach
> or detach an iommu domain to/from a pasid of a device, and refactors the
> exsiting IOMMU SVA implementation by assigning an SVA type of iommu
> domain to a shared virtual address and replacing sva_bind/unbind iommu
> ops with a set_dev_pasid domain ops.
> 
> The latter part changes the existing I/O page fault handling framework
> from only serving SVA to a generic one. Any driver or component could
> handle the I/O page faults for its domain in its own way by installing
> an I/O page fault handler.
> 
> This series has been functionally tested by Tony Zhu on Intel hardware
> and Zhangfei Gao on arm64 (Kunpeng920) hardware. Thanks a lot for the
> efforts. 
> 
> This series is also available on github:
> https://github.com/LuBaolu/intel-iommu/commits/iommu-sva-refactoring-v12
> 
> Please review and suggest.
> 
> Best regards,
> baolu
> 
> Change log:
> v12:
>  - Add blocking domain support in both vt-d and smmuv3 drivers and make
>    the set blocking domain through its own domain ops.
>  - Add a type parameter in iommu_get_domain_for_dev_pasid() to matach
>    the interested domain type.
>  - Only enforce ACS RR & UF in pci_enable_pasid() and refine the commit
>    messages according to Bjorn's suggestions.
>  - Misc code and comment refinement.

I think this is looking pretty good, aside from some minor remarks

Jason

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