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Date: Sat, 27 Aug 2022 11:18:01 +0800
From: kernel test robot <lkp@...el.com>
To: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>
Cc: llvm@...ts.linux.dev, kbuild-all@...ts.01.org,
linux-kernel@...r.kernel.org,
Matthias Brugger <matthias.bgg@...il.com>,
Nícolas F. R. A. Prado
<nfraprado@...labora.com>
Subject: [matthias-bgg:v6.0-next/soc 11/11]
drivers/soc/mediatek/mtk-svs.c:887:26: error: call to undeclared function
'FIELD_GET'; ISO C99 and later do not support implicit function declarations
Hi AngeloGioacchino,
FYI, the error/warning was bisected to this commit, please ignore it if it's irrelevant.
tree: https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux.git v6.0-next/soc
head: a92438c5a30a27b6791da025306a45478a6ac7a4
commit: a92438c5a30a27b6791da025306a45478a6ac7a4 [11/11] soc: mediatek: mtk-svs: Use bitfield access macros where possible
config: hexagon-randconfig-r041-20220827 (https://download.01.org/0day-ci/archive/20220827/202208271156.r27CHg8A-lkp@intel.com/config)
compiler: clang version 16.0.0 (https://github.com/llvm/llvm-project a2100daf12fb980a29fd1a9c85ccf8eaaaf79730)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux.git/commit/?id=a92438c5a30a27b6791da025306a45478a6ac7a4
git remote add matthias-bgg https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux.git
git fetch --no-tags matthias-bgg v6.0-next/soc
git checkout a92438c5a30a27b6791da025306a45478a6ac7a4
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=hexagon SHELL=/bin/bash drivers/soc/mediatek/
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@...el.com>
All errors (new ones prefixed by >>):
>> drivers/soc/mediatek/mtk-svs.c:887:26: error: call to undeclared function 'FIELD_GET'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
svsb->volt[turn_pt] = FIELD_GET(SVSB_VOPS_FLD_VOP0_4, vop30);
^
drivers/soc/mediatek/mtk-svs.c:909:20: error: call to undeclared function 'FIELD_GET'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
svsb->volt[0] = FIELD_GET(SVSB_VOPS_FLD_VOP0_4, vop30);
^
drivers/soc/mediatek/mtk-svs.c:1040:19: error: call to undeclared function 'FIELD_GET'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
svsb->volt[14] = FIELD_GET(SVSB_VOPS_FLD_VOP3_7, temp);
^
>> drivers/soc/mediatek/mtk-svs.c:1073:18: error: call to undeclared function 'FIELD_PREP'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
freqpct74_val = FIELD_PREP(SVSB_FREQPCTS_FLD_PCT0_4, svsb->freq_pct[8]) |
^
drivers/soc/mediatek/mtk-svs.c:1095:13: error: call to undeclared function 'FIELD_PREP'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
des_char = FIELD_PREP(SVSB_DESCHAR_FLD_BDES, svsb->bdes) |
^
5 errors generated.
vim +/FIELD_GET +887 drivers/soc/mediatek/mtk-svs.c
858
859 static void svs_get_bank_volts_v3(struct svs_platform *svsp)
860 {
861 struct svs_bank *svsb = svsp->pbank;
862 u32 i, j, *vop, vop74, vop30, turn_pt = svsb->turn_pt;
863 u32 b_sft, shift_byte = 0, opp_start = 0, opp_stop = 0;
864 u32 middle_index = (svsb->opp_count / 2);
865
866 if (svsb->phase == SVSB_PHASE_MON &&
867 svsb->volt_flags & SVSB_MON_VOLT_IGNORE)
868 return;
869
870 vop74 = svs_readl_relaxed(svsp, VOP74);
871 vop30 = svs_readl_relaxed(svsp, VOP30);
872
873 /* Target is to set svsb->volt[] by algorithm */
874 if (turn_pt < middle_index) {
875 if (svsb->type == SVSB_HIGH) {
876 /* volt[0] ~ volt[turn_pt - 1] */
877 for (i = 0; i < turn_pt; i++) {
878 b_sft = BITS8 * (shift_byte % REG_BYTES);
879 vop = (shift_byte < REG_BYTES) ? &vop30 :
880 &vop74;
881 svsb->volt[i] = (*vop >> b_sft) & GENMASK(7, 0);
882 shift_byte++;
883 }
884 } else if (svsb->type == SVSB_LOW) {
885 /* volt[turn_pt] + volt[j] ~ volt[opp_count - 1] */
886 j = svsb->opp_count - 7;
> 887 svsb->volt[turn_pt] = FIELD_GET(SVSB_VOPS_FLD_VOP0_4, vop30);
888 shift_byte++;
889 for (i = j; i < svsb->opp_count; i++) {
890 b_sft = BITS8 * (shift_byte % REG_BYTES);
891 vop = (shift_byte < REG_BYTES) ? &vop30 :
892 &vop74;
893 svsb->volt[i] = (*vop >> b_sft) & GENMASK(7, 0);
894 shift_byte++;
895 }
896
897 /* volt[turn_pt + 1] ~ volt[j - 1] by interpolate */
898 for (i = turn_pt + 1; i < j; i++)
899 svsb->volt[i] = interpolate(svsb->freq_pct[turn_pt],
900 svsb->freq_pct[j],
901 svsb->volt[turn_pt],
902 svsb->volt[j],
903 svsb->freq_pct[i]);
904 }
905 } else {
906 if (svsb->type == SVSB_HIGH) {
907 /* volt[0] + volt[j] ~ volt[turn_pt - 1] */
908 j = turn_pt - 7;
909 svsb->volt[0] = FIELD_GET(SVSB_VOPS_FLD_VOP0_4, vop30);
910 shift_byte++;
911 for (i = j; i < turn_pt; i++) {
912 b_sft = BITS8 * (shift_byte % REG_BYTES);
913 vop = (shift_byte < REG_BYTES) ? &vop30 :
914 &vop74;
915 svsb->volt[i] = (*vop >> b_sft) & GENMASK(7, 0);
916 shift_byte++;
917 }
918
919 /* volt[1] ~ volt[j - 1] by interpolate */
920 for (i = 1; i < j; i++)
921 svsb->volt[i] = interpolate(svsb->freq_pct[0],
922 svsb->freq_pct[j],
923 svsb->volt[0],
924 svsb->volt[j],
925 svsb->freq_pct[i]);
926 } else if (svsb->type == SVSB_LOW) {
927 /* volt[turn_pt] ~ volt[opp_count - 1] */
928 for (i = turn_pt; i < svsb->opp_count; i++) {
929 b_sft = BITS8 * (shift_byte % REG_BYTES);
930 vop = (shift_byte < REG_BYTES) ? &vop30 :
931 &vop74;
932 svsb->volt[i] = (*vop >> b_sft) & GENMASK(7, 0);
933 shift_byte++;
934 }
935 }
936 }
937
938 if (svsb->type == SVSB_HIGH) {
939 opp_start = 0;
940 opp_stop = svsb->turn_pt;
941 } else if (svsb->type == SVSB_LOW) {
942 opp_start = svsb->turn_pt;
943 opp_stop = svsb->opp_count;
944 }
945
946 for (i = opp_start; i < opp_stop; i++)
947 if (svsb->volt_flags & SVSB_REMOVE_DVTFIXED_VOLT)
948 svsb->volt[i] -= svsb->dvt_fixed;
949 }
950
951 static void svs_set_bank_freq_pct_v3(struct svs_platform *svsp)
952 {
953 struct svs_bank *svsb = svsp->pbank;
954 u32 i, j, *freq_pct, freq_pct74 = 0, freq_pct30 = 0;
955 u32 b_sft, shift_byte = 0, turn_pt;
956 u32 middle_index = (svsb->opp_count / 2);
957
958 for (i = 0; i < svsb->opp_count; i++) {
959 if (svsb->opp_dfreq[i] <= svsb->turn_freq_base) {
960 svsb->turn_pt = i;
961 break;
962 }
963 }
964
965 turn_pt = svsb->turn_pt;
966
967 /* Target is to fill out freq_pct74 / freq_pct30 by algorithm */
968 if (turn_pt < middle_index) {
969 if (svsb->type == SVSB_HIGH) {
970 /*
971 * If we don't handle this situation,
972 * SVSB_HIGH's FREQPCT74 / FREQPCT30 would keep "0"
973 * and this leads SVSB_LOW to work abnormally.
974 */
975 if (turn_pt == 0)
976 freq_pct30 = svsb->freq_pct[0];
977
978 /* freq_pct[0] ~ freq_pct[turn_pt - 1] */
979 for (i = 0; i < turn_pt; i++) {
980 b_sft = BITS8 * (shift_byte % REG_BYTES);
981 freq_pct = (shift_byte < REG_BYTES) ?
982 &freq_pct30 : &freq_pct74;
983 *freq_pct |= (svsb->freq_pct[i] << b_sft);
984 shift_byte++;
985 }
986 } else if (svsb->type == SVSB_LOW) {
987 /*
988 * freq_pct[turn_pt] +
989 * freq_pct[opp_count - 7] ~ freq_pct[opp_count -1]
990 */
991 freq_pct30 = svsb->freq_pct[turn_pt];
992 shift_byte++;
993 j = svsb->opp_count - 7;
994 for (i = j; i < svsb->opp_count; i++) {
995 b_sft = BITS8 * (shift_byte % REG_BYTES);
996 freq_pct = (shift_byte < REG_BYTES) ?
997 &freq_pct30 : &freq_pct74;
998 *freq_pct |= (svsb->freq_pct[i] << b_sft);
999 shift_byte++;
1000 }
1001 }
1002 } else {
1003 if (svsb->type == SVSB_HIGH) {
1004 /*
1005 * freq_pct[0] +
1006 * freq_pct[turn_pt - 7] ~ freq_pct[turn_pt - 1]
1007 */
1008 freq_pct30 = svsb->freq_pct[0];
1009 shift_byte++;
1010 j = turn_pt - 7;
1011 for (i = j; i < turn_pt; i++) {
1012 b_sft = BITS8 * (shift_byte % REG_BYTES);
1013 freq_pct = (shift_byte < REG_BYTES) ?
1014 &freq_pct30 : &freq_pct74;
1015 *freq_pct |= (svsb->freq_pct[i] << b_sft);
1016 shift_byte++;
1017 }
1018 } else if (svsb->type == SVSB_LOW) {
1019 /* freq_pct[turn_pt] ~ freq_pct[opp_count - 1] */
1020 for (i = turn_pt; i < svsb->opp_count; i++) {
1021 b_sft = BITS8 * (shift_byte % REG_BYTES);
1022 freq_pct = (shift_byte < REG_BYTES) ?
1023 &freq_pct30 : &freq_pct74;
1024 *freq_pct |= (svsb->freq_pct[i] << b_sft);
1025 shift_byte++;
1026 }
1027 }
1028 }
1029
1030 svs_writel_relaxed(svsp, freq_pct74, FREQPCT74);
1031 svs_writel_relaxed(svsp, freq_pct30, FREQPCT30);
1032 }
1033
1034 static void svs_get_bank_volts_v2(struct svs_platform *svsp)
1035 {
1036 struct svs_bank *svsb = svsp->pbank;
1037 u32 temp, i;
1038
1039 temp = svs_readl_relaxed(svsp, VOP74);
1040 svsb->volt[14] = FIELD_GET(SVSB_VOPS_FLD_VOP3_7, temp);
1041 svsb->volt[12] = FIELD_GET(SVSB_VOPS_FLD_VOP2_6, temp);
1042 svsb->volt[10] = FIELD_GET(SVSB_VOPS_FLD_VOP1_5, temp);
1043 svsb->volt[8] = FIELD_GET(SVSB_VOPS_FLD_VOP0_4, temp);
1044
1045 temp = svs_readl_relaxed(svsp, VOP30);
1046 svsb->volt[6] = FIELD_GET(SVSB_VOPS_FLD_VOP3_7, temp);
1047 svsb->volt[4] = FIELD_GET(SVSB_VOPS_FLD_VOP2_6, temp);
1048 svsb->volt[2] = FIELD_GET(SVSB_VOPS_FLD_VOP1_5, temp);
1049 svsb->volt[0] = FIELD_GET(SVSB_VOPS_FLD_VOP0_4, temp);
1050
1051 for (i = 0; i <= 12; i += 2)
1052 svsb->volt[i + 1] = interpolate(svsb->freq_pct[i],
1053 svsb->freq_pct[i + 2],
1054 svsb->volt[i],
1055 svsb->volt[i + 2],
1056 svsb->freq_pct[i + 1]);
1057
1058 svsb->volt[15] = interpolate(svsb->freq_pct[12],
1059 svsb->freq_pct[14],
1060 svsb->volt[12],
1061 svsb->volt[14],
1062 svsb->freq_pct[15]);
1063
1064 for (i = 0; i < svsb->opp_count; i++)
1065 svsb->volt[i] += svsb->volt_od;
1066 }
1067
1068 static void svs_set_bank_freq_pct_v2(struct svs_platform *svsp)
1069 {
1070 struct svs_bank *svsb = svsp->pbank;
1071 u32 freqpct74_val, freqpct30_val;
1072
> 1073 freqpct74_val = FIELD_PREP(SVSB_FREQPCTS_FLD_PCT0_4, svsb->freq_pct[8]) |
1074 FIELD_PREP(SVSB_FREQPCTS_FLD_PCT1_5, svsb->freq_pct[10]) |
1075 FIELD_PREP(SVSB_FREQPCTS_FLD_PCT2_6, svsb->freq_pct[12]) |
1076 FIELD_PREP(SVSB_FREQPCTS_FLD_PCT3_7, svsb->freq_pct[14]);
1077
1078 freqpct30_val = FIELD_PREP(SVSB_FREQPCTS_FLD_PCT0_4, svsb->freq_pct[0]) |
1079 FIELD_PREP(SVSB_FREQPCTS_FLD_PCT1_5, svsb->freq_pct[2]) |
1080 FIELD_PREP(SVSB_FREQPCTS_FLD_PCT2_6, svsb->freq_pct[4]) |
1081 FIELD_PREP(SVSB_FREQPCTS_FLD_PCT3_7, svsb->freq_pct[6]);
1082
1083 svs_writel_relaxed(svsp, freqpct74_val, FREQPCT74);
1084 svs_writel_relaxed(svsp, freqpct30_val, FREQPCT30);
1085 }
1086
--
0-DAY CI Kernel Test Service
https://01.org/lkp
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