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Message-ID: <YwyHdMv1JsQNuVGS@lpieralisi>
Date: Mon, 29 Aug 2022 11:31:32 +0200
From: Lorenzo Pieralisi <lpieralisi@...nel.org>
To: Pali Rohár <pali@...nel.org>
Cc: Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
Rob Herring <robh@...nel.org>,
Krzysztof Wilczyński <kw@...ux.com>,
Bjorn Helgaas <bhelgaas@...gle.com>, linux-pci@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] PCI: aardvark: Add support for PCI Bridge Subsystem
Vendor ID on emulated bridge
On Tue, Jul 12, 2022 at 12:59:15AM +0200, Pali Rohár wrote:
> Register with Subsystem Device/Vendor ID is at offset 0x2c. Export is via
> emulated bridge.
"Export it..." I suppose.
So in short, this patch enables support for the Subsystem Device/Vendor
ID - by reading it in the PCI controller config space and storing it
in the emulated bridge control structures, so that it is exposed in
the respective PCI capability.
Correct ?
Thanks,
Lorenzo
> After this change Subsystem ID is visible in lspci output at line:
>
> Capabilities: [40] Subsystem
>
> Signed-off-by: Pali Rohár <pali@...nel.org>
>
> ---
> Changes in v2:
> * Fix wrong rebase, do not add PCIE_CORE_EXP_ROM_BAR_REG
> ---
> drivers/pci/controller/pci-aardvark.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
> index 74511f015168..060936ef01fe 100644
> --- a/drivers/pci/controller/pci-aardvark.c
> +++ b/drivers/pci/controller/pci-aardvark.c
> @@ -32,6 +32,7 @@
> #define PCIE_CORE_DEV_ID_REG 0x0
> #define PCIE_CORE_CMD_STATUS_REG 0x4
> #define PCIE_CORE_DEV_REV_REG 0x8
> +#define PCIE_CORE_SSDEV_ID_REG 0x2c
> #define PCIE_CORE_PCIEXP_CAP 0xc0
> #define PCIE_CORE_ERR_CAPCTL_REG 0x118
> #define PCIE_CORE_ERR_CAPCTL_ECRC_CHK_TX BIT(5)
> @@ -982,6 +983,8 @@ static int advk_sw_pci_bridge_init(struct advk_pcie *pcie)
> /* Indicates supports for Completion Retry Status */
> bridge->pcie_conf.rootcap = cpu_to_le16(PCI_EXP_RTCAP_CRSVIS);
>
> + bridge->subsystem_vendor_id = advk_readl(pcie, PCIE_CORE_SSDEV_ID_REG) & 0xffff;
> + bridge->subsystem_id = advk_readl(pcie, PCIE_CORE_SSDEV_ID_REG) >> 16;
> bridge->has_pcie = true;
> bridge->data = pcie;
> bridge->ops = &advk_pci_bridge_emul_ops;
> --
> 2.20.1
>
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