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Message-Id: <166182784427.333703.15037180707046189221.b4-ty@kernel.org>
Date:   Mon, 29 Aug 2022 21:50:55 -0500
From:   Bjorn Andersson <andersson@...nel.org>
To:     Manivannan Sadhasivam <mani@...nel.org>, mchehab@...nel.org,
        Bjorn Andersson <andersson@...nel.org>, bp@...en8.de
Cc:     linux-edac@...r.kernel.org, rric@...nel.org,
        quic_tsoni@...cinc.com, linux-arm-msm@...r.kernel.org,
        james.morse@....com, quic_saipraka@...cinc.com,
        linux-kernel@...r.kernel.org
Subject: Re: (subset) [PATCH v3 0/5] Fix crash when using Qcom LLCC/EDAC drivers

On Thu, 25 Aug 2022 10:08:54 +0530, Manivannan Sadhasivam wrote:
> This series fixes the crash seen on the Qualcomm SM8450 chipset with the
> LLCC/EDAC drivers. The problem was due to the Qcom EDAC driver using the
> fixed LLCC register offsets for detecting the LLCC errors.
> 
> This seems to have worked for SoCs till SM8450. But in SM8450, the LLCC
> register offsets were changed. So accessing the fixed offsets causes the
> crash on this platform.
> 
> [...]

Applied, thanks!

[1/5] soc: qcom: llcc: Rename reg_offset structs to reflect LLCC version
      commit: 5365cea199c70d6abedc2e1be850c03e990f1829
[2/5] soc: qcom: llcc: Pass LLCC version based register offsets to EDAC driver
      commit: c13d7d261e361dbaf5adbdc216ee4a1204c48001

Best regards,
-- 
Bjorn Andersson <andersson@...nel.org>

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