linux-kernel - Re: [PATCH v2 1/2] arm64: dts: ti: k3-am64: Add SA2UL address space to Main CBASS ranges

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <8735ddu98y.fsf@kamlesh.i-did-not-set--mail-host-address--so-tickle-me>
Date:   Tue, 30 Aug 2022 19:24:53 +0530
From:   Kamlesh Gurudasani <kamlesh@...com>
To:     Jayesh Choudhary <j-choudhary@...com>, <nm@...com>,
        <vigneshr@...com>, <devicetree@...r.kernel.org>
CC:     <kristo@...nel.org>, <robh+dt@...nel.org>,
        <krzysztof.kozlowski+dt@...aro.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <j-choudhary@...com>
Subject: Re: [PATCH v2 1/2] arm64: dts: ti: k3-am64: Add SA2UL address space
 to Main CBASS ranges

Jayesh Choudhary <j-choudhary@...com> writes:

> From: Suman Anna <s-anna@...com>
>
> Add the address space for the SA2UL in MAIN domain to the ranges property
> of the cbass_main interconnect node so that the addresses within the
> corresponding sram nodes and its children can be translated properly by
> the relevant OF address API.
>
> Signed-off-by: Suman Anna <s-anna@...com>
> Signed-off-by: Jayesh Choudhary <j-choudhary@...com>
> ---
>  arch/arm64/boot/dts/ti/k3-am64.dtsi | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am64.dtsi b/arch/arm64/boot/dts/ti/k3-am64.dtsi
> index 016dd8511ca6..c858725133af 100644
> --- a/arch/arm64/boot/dts/ti/k3-am64.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am64.dtsi
> @@ -82,6 +82,7 @@
>  			 <0x00 0x3b000000 0x00 0x3b000000 0x00 0x00000400>, /* GPMC0_CFG */
>  			 <0x00 0x3cd00000 0x00 0x3cd00000 0x00 0x00000200>, /* TIMERMGR0_CONFIG */
>  			 <0x00 0x3f004000 0x00 0x3f004000 0x00 0x00000400>, /* GICSS0_REGS */
> +			 <0x00 0x40900000 0x00 0x40900000 0x00 0x00030000>, /* SA2_UL0 */
>  			 <0x00 0x43000000 0x00 0x43000000 0x00 0x00020000>, /* CTRL_MMR0 */
>  			 <0x00 0x44043000 0x00 0x44043000 0x00 0x00000fe0>, /* TI SCI DEBUG */
>  			 <0x00 0x48000000 0x00 0x48000000 0x00 0x06400000>, /* DMASS */

Reviewed-by: Kamlesh Gurudasani <kamlesh@...com>