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Message-ID: <569a5d63af850d4180546c2c25220cbb988846eb.camel@pengutronix.de>
Date: Tue, 30 Aug 2022 18:46:25 +0200
From: Philipp Zabel <p.zabel@...gutronix.de>
To: Richard Zhu <hongxing.zhu@....com>, l.stach@...gutronix.de,
bhelgaas@...gle.com, lorenzo.pieralisi@....com, robh@...nel.org,
shawnguo@...nel.org, vkoul@...nel.org,
alexander.stein@...tq-group.com, marex@...x.de,
richard.leitner@...ux.dev
Cc: linux-phy@...ts.infradead.org, devicetree@...r.kernel.org,
linux-pci@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, kernel@...gutronix.de,
linux-imx@....com
Subject: Re: [PATCH v5 4/7] reset: imx7: Fix the iMX8MP PCIe PHY PERST
support
Hi,
On Di, 2022-08-30 at 15:46 +0800, Richard Zhu wrote:
> On i.MX7/iMX8MM/iMX8MQ, the initialized default value of PERST bit(BIT3)
> of SRC_PCIEPHY_RCR is 1b'1.
> But i.MX8MP has one inversed default value 1b'0 of PERST bit.
>
> And the PERST bit should be kept 1b'1 after power and clocks are stable.
> So fix the i.MX8MP PCIe PHY PERST support here.
>
> Fixes: e08672c03981 ("reset: imx7: Add support for i.MX8MP SoC")
> Signed-off-by: Richard Zhu <hongxing.zhu@....com>
> Reviewed-by: Philipp Zabel <p.zabel@...gutronix.de>
> Tested-by: Marek Vasut <marex@...x.de>
> Tested-by: Richard Leitner <richard.leitner@...data.com>
> Tested-by: Alexander Stein <alexander.stein@...tq-group.com>
I've applied this patch to the reset/fixes branch.
regards
Philipp
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