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Message-ID: <84a68eff-be64-71ce-1533-1e228d3da2a4@amazon.com>
Date: Wed, 31 Aug 2022 08:49:49 +0300
From: "Farber, Eliav" <farbere@...zon.com>
To: Guenter Roeck <linux@...ck-us.net>, <jdelvare@...e.com>,
<robh+dt@...nel.org>, <p.zabel@...gutronix.de>,
<rtanwar@...linear.com>, <linux-hwmon@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
CC: <talel@...zon.com>, <hhhawa@...zon.com>, <jonnyc@...zon.com>,
<hanochu@...zon.com>, <ronenk@...zon.com>, <itamark@...zon.com>,
<shellykz@...zon.com>, <shorer@...zon.com>, <amitlavi@...zon.com>,
<almogbs@...zon.com>, <dkl@...zon.com>,
<andriy.shevchenko@...el.com>, "Farber, Eliav" <farbere@...zon.com>
Subject: Re: [PATCH v3 02/19] hwmon: (mr75203) fix VM sensor allocation when "intel,
vm-map" not defined
On 8/31/2022 8:36 AM, Guenter Roeck wrote:
> On 8/30/22 12:21, Eliav Farber wrote:
>> Bug fix - in case "intel,vm-map" is missing in device-tree ,'num' is set
>> to 0, and no voltage channel infos are allocated.
>>
>> Signed-off-by: Eliav Farber <farbere@...zon.com>
>> ---
>> drivers/hwmon/mr75203.c | 28 ++++++++++++----------------
>> 1 file changed, 12 insertions(+), 16 deletions(-)
>>
>> diff --git a/drivers/hwmon/mr75203.c b/drivers/hwmon/mr75203.c
>> index 046523d47c29..0e29877a1a9c 100644
>> --- a/drivers/hwmon/mr75203.c
>> +++ b/drivers/hwmon/mr75203.c
>> @@ -580,8 +580,6 @@ static int mr75203_probe(struct platform_device
>> *pdev)
>> }
>>
>> if (vm_num) {
>> - u32 num = vm_num;
>> -
>> ret = pvt_get_regmap(pdev, "vm", pvt);
>> if (ret)
>> return ret;
>> @@ -594,30 +592,28 @@ static int mr75203_probe(struct platform_device
>> *pdev)
>> ret = device_property_read_u8_array(dev, "intel,vm-map",
>> pvt->vm_idx, vm_num);
>> if (ret) {
>> - num = 0;
>> + /*
>> + * Incase intel,vm-map property is not defined, we
>> + * assume incremental channel numbers.
>> + */
>> + for (i = 0; i < vm_num; i++)
>> + pvt->vm_idx[i] = i;
>> } else {
>> for (i = 0; i < vm_num; i++)
>> if (pvt->vm_idx[i] >= vm_num ||
>> - pvt->vm_idx[i] == 0xff) {
>> - num = i;
>> + pvt->vm_idx[i] == 0xff)
>> break;
>
> So all vm_idx values from 0x00 to 0xfe would be acceptable ?
> Does the chip really have that many registers (0x200 + 0x40 + 0x200 *
> 0xfe) ?
> Is that documented somewhere ?
According to the code vm_num is limited to 32 because the mask is
only 5 bits:
#define VM_NUM_MSK GENMASK(20, 16)
#define VM_NUM_SFT 16
vm_num = (val & VM_NUM_MSK) >> VM_NUM_SFT;
In practice according to the data sheet I have:
0 <= VM instances <= 8
--
Regards, Eliav
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