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Message-ID: <079c023c-fa2d-1a5a-41ec-6d364067eb7d@gmail.com>
Date:   Thu, 1 Sep 2022 10:13:18 +0200
From:   Matthias Brugger <matthias.bgg@...il.com>
To:     Peter Chiu <chui-hao.chiu@...iatek.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
Cc:     devicetree@...r.kernel.org, Ryder Lee <ryder.Lee@...iatek.com>,
        Evelyn Tsai <evelyn.tsai@...iatek.com>,
        Sam Shih <sam.shih@...iatek.com>,
        linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4] arm64: dts: mt7986: add built-in Wi-Fi device nodes



On 01/09/2022 05:47, Peter Chiu wrote:
> On Tue, 2022-08-30 at 10:43 +0200, Matthias Brugger wrote:
>>
>> On 30/06/2022 11:49, Peter Chiu wrote:
>>> This enables built-in 802.11ax Wi-Fi support.
>>>
>>> Reviewed-by: Sam Shih <sam.shih@...iatek.com>
>>> Reviewed-by: Ryder Lee <ryder.lee@...iatek.com>
>>> Signed-off-by: Peter Chiu <chui-hao.chiu@...iatek.com>
>>> ---
>>> v2: add clocks and clock-names.
>>> v3: rename wmac to wifi and change underscores to dash in node
>>> names.
>>> v4: rebase to the latest codebase.
>>> ---
>>>    arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 41
>>> +++++++++++++++++++
>>>    arch/arm64/boot/dts/mediatek/mt7986a.dtsi    | 23 +++++++++++
>>>    arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts | 43
>>> ++++++++++++++++++++
>>>    3 files changed, 107 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
>>> b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
>>> index 882277a..28cd168 100644
>>> --- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
>>> +++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
>>> @@ -115,6 +115,13 @@ &uart2 {
>>>    	status = "okay";
>>>    };
>>>    
>>> +&wifi {
>>> +	status = "okay";
>>> +	pinctrl-names = "default", "dbdc";
>>> +	pinctrl-0 = <&wf_2g_5g_pins>;
>>> +	pinctrl-1 = <&wf_dbdc_pins>;
>>> +};
>>> +
>>>    &pio {
>>>    	uart1_pins: uart1-pins {
>>>    		mux {
>>> @@ -129,4 +136,38 @@ mux {
>>>    			groups = "uart2";
>>>    		};
>>>    	};
>>> +
>>> +	wf_2g_5g_pins: wf-2g-5g-pins {
>>> +		mux {
>>> +			function = "wifi";
>>> +			groups = "wf_2g", "wf_5g";
>>
>> yaml says:
>>            - if:
>>                 properties:
>>                   function:
>>                     const: wifi
>>               then:
>>                 properties:
>>                   groups:
>>                     enum: [wf_2g, wf_5g, wf_dbdc]
>>
>>
>> Did you run the binding checker against this DTS?
> The binding checker showed the groups setting is too long. We will send
> a patch to fix yaml by setting groups as string-array.
> 

Wait, does this mean the binding was wrong in the first place, as you can't set 
all three groups in one node?

>> Why can't we just merge wf_2g_5g_pins with wf_dbdc_pins?
> Since they use different pinmux settings on the same pin, we need to
> distinguish them.
> 

wf-2g-5g-pins and wf-dbdc-pins set the same drive-strength to the very same 
group of pins. What do you mean exactly? Sorry I'm not an expert on the pinctrl 
infrastructure.

Regards,
Matthias


> Best Regards,
> Peter Chiu
>>
>> Regards,
>> Matthias
>>
>>> +		};
>>> +		conf {
>>> +			pins = "WF0_HB1", "WF0_HB2", "WF0_HB3",
>>> "WF0_HB4",
>>> +			       "WF0_HB0", "WF0_HB0_B", "WF0_HB5",
>>> "WF0_HB6",
>>> +			       "WF0_HB7", "WF0_HB8", "WF0_HB9",
>>> "WF0_HB10",
>>> +			       "WF0_TOP_CLK", "WF0_TOP_DATA",
>>> "WF1_HB1",
>>> +			       "WF1_HB2", "WF1_HB3", "WF1_HB4",
>>> "WF1_HB0",
>>> +			       "WF1_HB5", "WF1_HB6", "WF1_HB7",
>>> "WF1_HB8",
>>> +			       "WF1_TOP_CLK", "WF1_TOP_DATA";
>>> +			drive-strength = <4>;
>>> +		};
>>> +	};
>>> +
>>> +	wf_dbdc_pins: wf-dbdc-pins {
>>> +		mux {
>>> +			function = "wifi";
>>> +			groups = "wf_dbdc";
>>> +		};
>>> +		conf {
>>> +			pins = "WF0_HB1", "WF0_HB2", "WF0_HB3",
>>> "WF0_HB4",
>>> +			       "WF0_HB0", "WF0_HB0_B", "WF0_HB5",
>>> "WF0_HB6",
>>> +			       "WF0_HB7", "WF0_HB8", "WF0_HB9",
>>> "WF0_HB10",
>>> +			       "WF0_TOP_CLK", "WF0_TOP_DATA",
>>> "WF1_HB1",
>>> +			       "WF1_HB2", "WF1_HB3", "WF1_HB4",
>>> "WF1_HB0",
>>> +			       "WF1_HB5", "WF1_HB6", "WF1_HB7",
>>> "WF1_HB8",
>>> +			       "WF1_TOP_CLK", "WF1_TOP_DATA";
>>> +			drive-strength = <4>;
>>> +		};
>>> +	};
>>>    };
>>> diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
>>> b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
>>> index e3a407d..890ded0 100644
>>> --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
>>> +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
>>> @@ -7,6 +7,7 @@
>>>    #include <dt-bindings/interrupt-controller/irq.h>
>>>    #include <dt-bindings/interrupt-controller/arm-gic.h>
>>>    #include <dt-bindings/clock/mt7986-clk.h>
>>> +#include <dt-bindings/reset/mt7986-resets.h>
>>>    
>>>    / {
>>>    	interrupt-parent = <&gic>;
>>> @@ -70,6 +71,11 @@ secmon_reserved: secmon@...00000 {
>>>    			reg = <0 0x43000000 0 0x30000>;
>>>    			no-map;
>>>    		};
>>> +
>>> +		wmcpu_emi: wmcpu-reserved@...00000 {
>>> +			no-map;
>>> +			reg = <0 0x4fc00000 0 0x00100000>;
>>> +		};
>>>    	};
>>>    
>>>    	timer {
>>> @@ -261,6 +267,23 @@ eth: ethernet@...00000 {
>>>    			#size-cells = <0>;
>>>    			status = "disabled";
>>>    		};
>>> +
>>> +		wifi: wifi@...00000 {
>>> +			compatible = "mediatek,mt7986-wmac";
>>> +			resets = <&watchdog
>>> MT7986_TOPRGU_CONSYS_SW_RST>;
>>> +			reset-names = "consys";
>>> +			clocks = <&topckgen CLK_TOP_CONN_MCUSYS_SEL>,
>>> +				 <&topckgen CLK_TOP_AP2CNN_HOST_SEL>;
>>> +			clock-names = "mcu", "ap2conn";
>>> +			reg = <0 0x18000000 0 0x1000000>,
>>> +			      <0 0x10003000 0 0x1000>,
>>> +			      <0 0x11d10000 0 0x1000>;
>>> +			interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
>>> +				     <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
>>> +				     <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
>>> +				     <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
>>> +			memory-region = <&wmcpu_emi>;
>>> +		};
>>>    	};
>>>    
>>>    };
>>> diff --git a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
>>> b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
>>> index 0f49d57..7f21b10 100644
>>> --- a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
>>> +++ b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
>>> @@ -98,3 +98,46 @@ fixed-link {
>>>    		};
>>>    	};
>>>    };
>>> +
>>> +&wifi {
>>> +	status = "okay";
>>> +	pinctrl-names = "default", "dbdc";
>>> +	pinctrl-0 = <&wf_2g_5g_pins>;
>>> +	pinctrl-1 = <&wf_dbdc_pins>;
>>> +};
>>> +
>>> +&pio {
>>> +	wf_2g_5g_pins: wf-2g-5g-pins {
>>> +		mux {
>>> +			function = "wifi";
>>> +			groups = "wf_2g", "wf_5g";
>>> +		};
>>> +		conf {
>>> +			pins = "WF0_HB1", "WF0_HB2", "WF0_HB3",
>>> "WF0_HB4",
>>> +			       "WF0_HB0", "WF0_HB0_B", "WF0_HB5",
>>> "WF0_HB6",
>>> +			       "WF0_HB7", "WF0_HB8", "WF0_HB9",
>>> "WF0_HB10",
>>> +			       "WF0_TOP_CLK", "WF0_TOP_DATA",
>>> "WF1_HB1",
>>> +			       "WF1_HB2", "WF1_HB3", "WF1_HB4",
>>> "WF1_HB0",
>>> +			       "WF1_HB5", "WF1_HB6", "WF1_HB7",
>>> "WF1_HB8",
>>> +			       "WF1_TOP_CLK", "WF1_TOP_DATA";
>>> +			drive-strength = <4>;
>>> +		};
>>> +	};
>>> +
>>> +	wf_dbdc_pins: wf-dbdc-pins {
>>> +		mux {
>>> +			function = "wifi";
>>> +			groups = "wf_dbdc";
>>> +		};
>>> +		conf {
>>> +			pins = "WF0_HB1", "WF0_HB2", "WF0_HB3",
>>> "WF0_HB4",
>>> +			       "WF0_HB0", "WF0_HB0_B", "WF0_HB5",
>>> "WF0_HB6",
>>> +			       "WF0_HB7", "WF0_HB8", "WF0_HB9",
>>> "WF0_HB10",
>>> +			       "WF0_TOP_CLK", "WF0_TOP_DATA",
>>> "WF1_HB1",
>>> +			       "WF1_HB2", "WF1_HB3", "WF1_HB4",
>>> "WF1_HB0",
>>> +			       "WF1_HB5", "WF1_HB6", "WF1_HB7",
>>> "WF1_HB8",
>>> +			       "WF1_TOP_CLK", "WF1_TOP_DATA";
>>> +			drive-strength = <4>;
>>> +		};
>>> +	};
>>> +};
> 

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