linux-kernel - Re: [PATCH v17 10/10] drm/mediatek: dp: Audio support for MT8195

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Message-ID: <e5e925911c428cab87bbe12cda1dd657e1bb5075.camel@mediatek.com>
Date:   Fri, 2 Sep 2022 16:57:58 +0800
From:   CK Hu <ck.hu@...iatek.com>
To:     Bo-Chen Chen <rex-bc.chen@...iatek.com>, <chunkuang.hu@...nel.org>,
        <p.zabel@...gutronix.de>, <daniel@...ll.ch>, <robh+dt@...nel.org>,
        <krzysztof.kozlowski+dt@...aro.org>, <mripard@...nel.org>,
        <tzimmermann@...e.de>, <matthias.bgg@...il.com>, <deller@....de>,
        <airlied@...ux.ie>
CC:     <msp@...libre.com>, <granquet@...libre.com>,
        <jitao.shi@...iatek.com>, <wenst@...omium.org>,
        <angelogioacchino.delregno@...labora.com>,
        <liangxu.xu@...iatek.com>, <dri-devel@...ts.freedesktop.org>,
        <linux-mediatek@...ts.infradead.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-fbdev@...r.kernel.org>,
        <Project_Global_Chrome_Upstream_Group@...iatek.com>
Subject: Re: [PATCH v17 10/10] drm/mediatek: dp: Audio support for MT8195

Hi, Bo-Chen:

On Thu, 2022-09-01 at 12:41 +0800, Bo-Chen Chen wrote:
> From: Guillaume Ranquet <granquet@...libre.com>
> 
> This patch adds audio support to the DP driver for MT8195 with up to
> 8
> channels.
> 
> Signed-off-by: Guillaume Ranquet <granquet@...libre.com>
> Signed-off-by: Bo-Chen Chen <rex-bc.chen@...iatek.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_dp.c     | 482
> +++++++++++++++++++++++++-
>  drivers/gpu/drm/mediatek/mtk_dp_reg.h |  51 +++
>  2 files changed, 532 insertions(+), 1 deletion(-)
> 
> 

[snip]

> +#define MTK_DP_ENC0_P0_308C			0x308c
> +#define CH_STATUS_0_DP_ENC0_P0_MASK			GENMASK(15, 0)
> +#define MTK_DP_ENC0_P0_3090			0x3090
> +#define CH_STATUS_1_DP_ENC0_P0_MASK			GENMASK(15, 0)
> +#define MTK_DP_ENC0_P0_3094			0x3094
> +#define CH_STATUS_2_DP_ENC0_P0_MASK			GENMASK(7, 0)
> +#define MTK_DP_ENC0_P0_30A0			0x30a0

Useless, so drop it.

Regards,
CK

> +#define DP_ENC0_30A0_MASK				(BIT(7) |
> BIT(8) | BIT(12))
> +#define MTK_DP_ENC0_P0_30A4			0x30a4
> +#define AU_TS_CFG_DP_ENC0_P0_MASK			GENMASK(7, 0)
> +#define MTK_DP_ENC0_P0_30A8			0x30a8
>