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Message-ID: <8e398e71-1283-b5d7-2b17-958a25563c25@collabora.com>
Date: Fri, 2 Sep 2022 11:00:46 +0200
From: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>
To: "Chengci.Xu" <chengci.xu@...iatek.com>,
Yong Wu <yong.wu@...iatek.com>, Joerg Roedel <joro@...tes.org>,
Will Deacon <will@...nel.org>,
Robin Murphy <robin.murphy@....com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Matthias Brugger <matthias.bgg@...il.com>
Cc: iommu@...ts.linux.dev, linux-mediatek@...ts.infradead.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
Project_Global_Chrome_Upstream_Group@...iatek.com
Subject: Re: [PATCH v2 2/3] iommu/mediatek: Add enable IOMMU SMC command for
INFRA master
Il 31/08/22 14:55, Chengci.Xu ha scritto:
> The register which can enable IOMMU for INFRA master should be setted
> in secure world for security concerns. Therefore, we add a SMC command
> for INFRA master to enable/disable INFRA IOMMU in ATF. This function is
> prepared for MT8188.
>
> Signed-off-by: Chengci.Xu <chengci.xu@...iatek.com>
> ---
> drivers/iommu/mtk_iommu.c | 34 ++++++++++++++++++++++++++--------
> include/soc/mediatek/smi.h | 1 +
> 2 files changed, 27 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
> index 7e363b1f24df..6fe780783ec8 100644
> --- a/drivers/iommu/mtk_iommu.c
> +++ b/drivers/iommu/mtk_iommu.c
> @@ -3,6 +3,7 @@
> * Copyright (c) 2015-2016 MediaTek Inc.
> * Author: Yong Wu <yong.wu@...iatek.com>
> */
> +#include <linux/arm-smccc.h>
> #include <linux/bitfield.h>
> #include <linux/bug.h>
> #include <linux/clk.h>
> @@ -28,6 +29,7 @@
> #include <linux/slab.h>
> #include <linux/spinlock.h>
> #include <linux/soc/mediatek/infracfg.h>
> +#include <linux/soc/mediatek/mtk_sip_svc.h>
> #include <asm/barrier.h>
> #include <soc/mediatek/smi.h>
>
> @@ -138,6 +140,7 @@
> #define PM_CLK_AO BIT(15)
> #define IFA_IOMMU_PCIE_SUPPORT BIT(16)
> #define PGTABLE_PA_35_EN BIT(17)
> +#define CFG_IFA_MASTER_IN_ATF BIT(18)
>
> #define MTK_IOMMU_HAS_FLAG_MASK(pdata, _x, mask) \
> ((((pdata)->flags) & (mask)) == (_x))
> @@ -554,14 +557,29 @@ static int mtk_iommu_config(struct mtk_iommu_data *data, struct device *dev,
> else
> larb_mmu->mmu &= ~MTK_SMI_MMU_EN(portid);
> } else if (MTK_IOMMU_IS_TYPE(data->plat_data, MTK_IOMMU_TYPE_INFRA)) {
> - peri_mmuen_msk = BIT(portid);
> - /* PCI dev has only one output id, enable the next writing bit for PCIe */
> - if (dev_is_pci(dev))
> - peri_mmuen_msk |= BIT(portid + 1);
> -
> - peri_mmuen = enable ? peri_mmuen_msk : 0;
> - ret = regmap_update_bits(data->pericfg, PERICFG_IOMMU_1,
> - peri_mmuen_msk, peri_mmuen);
> + if (MTK_IOMMU_HAS_FLAG(data->plat_data, CFG_IFA_MASTER_IN_ATF)) {
> + struct arm_smccc_res res;
> +
> + portid = MTK_M4U_TO_PORT(fwspec->ids[i]);
This assignment is redundant, as portid is initialized to the same value
just a few lines before. Please drop it.
Everything else looks good.
Regards,
Angelo
> + arm_smccc_smc(MTK_SIP_KERNEL_IOMMU_CONTROL,
> + IOMMU_ATF_CMD_CONFIG_INFRA_IOMMU,
> + portid, enable, 0, 0, 0, 0, &res);
> + ret = (int)res.a0;
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