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Message-ID: <6865a605-2428-e6c2-09dc-aa2a66e48c55@microchip.com>
Date: Fri, 2 Sep 2022 09:33:27 +0000
From: <Conor.Dooley@...rochip.com>
To: <guoren@...nel.org>, <heiko@...ech.de>
CC: <paul.walmsley@...ive.com>, <palmer@...belt.com>,
<aou@...s.berkeley.edu>, <apatel@...tanamicro.com>,
<atishp@...osinc.com>, <linux-riscv@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 4/4] riscv: check for kernel config option in t-head
memory types errata
On 02/09/2022 02:06, Guo Ren wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> Is it a Fixes?
Looks like one to me, seems a fixes tag would be good to
have here... Either way:
Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>
>
> On Fri, Sep 2, 2022 at 6:28 AM Heiko Stuebner <heiko@...ech.de> wrote:
>>
>> The t-head variant of page-based memory types should also check first
>> for the enabled kernel config option.
>>
>> Signed-off-by: Heiko Stuebner <heiko@...ech.de>
>> ---
>> arch/riscv/errata/thead/errata.c | 3 +++
>> 1 file changed, 3 insertions(+)
>>
>> diff --git a/arch/riscv/errata/thead/errata.c b/arch/riscv/errata/thead/errata.c
>> index a6f4bd8ccf3f..902e12452821 100644
>> --- a/arch/riscv/errata/thead/errata.c
>> +++ b/arch/riscv/errata/thead/errata.c
>> @@ -17,6 +17,9 @@
>> static bool errata_probe_pbmt(unsigned int stage,
>> unsigned long arch_id, unsigned long impid)
>> {
>> + if (!IS_ENABLED(CONFIG_ERRATA_THEAD_PBMT))
>> + return false;
>> +
>> if (arch_id != 0 || impid != 0)
>> return false;
>>
>> --
>> 2.35.1
>>
>
>
> --
> Best Regards
> Guo Ren
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