linux-kernel - Re: [PATCH 1/4] riscv: cleanup svpbmt cpufeature probing

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Date:   Fri, 2 Sep 2022 09:31:27 +0000
From:   <Conor.Dooley@...rochip.com>
To:     <heiko@...ech.de>, <paul.walmsley@...ive.com>,
        <palmer@...belt.com>, <aou@...s.berkeley.edu>
CC:     <guoren@...nel.org>, <apatel@...tanamicro.com>,
        <atishp@...osinc.com>, <linux-riscv@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/4] riscv: cleanup svpbmt cpufeature probing

On 01/09/2022 23:27, Heiko Stuebner wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> This can also do without the ifdef and use IS_ENABLED instead and
> for better readability, getting rid of that switch also seems
> waranted.

The change itself looks great to me, but the commit message here
does not stand by itself - the "also" stuff reads a bit oddly.
How about:
---8<---
For better readability (and compile time coverage) use IS_ENABLED
instead of ifdef and drop the new unneeded switch statement.
---8<---

Call me biased, but I much prefer how this looks now...

Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>

> 
> Signed-off-by: Heiko Stuebner <heiko@...ech.de>
> ---
>   arch/riscv/kernel/cpufeature.c | 13 +++++--------
>   1 file changed, 5 insertions(+), 8 deletions(-)
> 
> diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> index 553d755483ed..764ea220161f 100644
> --- a/arch/riscv/kernel/cpufeature.c
> +++ b/arch/riscv/kernel/cpufeature.c
> @@ -253,16 +253,13 @@ void __init riscv_fill_hwcap(void)
>   #ifdef CONFIG_RISCV_ALTERNATIVE
>   static bool __init_or_module cpufeature_probe_svpbmt(unsigned int stage)
>   {
> -#ifdef CONFIG_RISCV_ISA_SVPBMT
> -       switch (stage) {
> -       case RISCV_ALTERNATIVES_EARLY_BOOT:
> +       if (!IS_ENABLED(CONFIG_RISCV_ISA_SVPBMT))
>                  return false;
> -       default:
> -               return riscv_isa_extension_available(NULL, SVPBMT);
> -       }
> -#endif
> 
> -       return false;
> +       if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)
> +               return false;
> +
> +       return riscv_isa_extension_available(NULL, SVPBMT);
>   }
> 
>   static bool __init_or_module cpufeature_probe_zicbom(unsigned int stage)
> --
> 2.35.1
>