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Message-ID: <CAJF2gTRnhN37C3pd6FYKX8KEVUQHm5PzWTf6Urxe4kwVW5hg7Q@mail.gmail.com>
Date:   Fri, 2 Sep 2022 09:07:34 +0800
From:   Guo Ren <guoren@...nel.org>
To:     Heiko Stuebner <heiko@...ech.de>
Cc:     paul.walmsley@...ive.com, palmer@...belt.com,
        aou@...s.berkeley.edu, conor.dooley@...rochip.com,
        apatel@...tanamicro.com, atishp@...osinc.com,
        linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/4] riscv: cleanup svpbmt cpufeature probing

Reviewed-by: Guo Ren <guoren@...nel.org>

On Fri, Sep 2, 2022 at 6:28 AM Heiko Stuebner <heiko@...ech.de> wrote:
>
> This can also do without the ifdef and use IS_ENABLED instead and
> for better readability, getting rid of that switch also seems
> waranted.
>
> Signed-off-by: Heiko Stuebner <heiko@...ech.de>
> ---
>  arch/riscv/kernel/cpufeature.c | 13 +++++--------
>  1 file changed, 5 insertions(+), 8 deletions(-)
>
> diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> index 553d755483ed..764ea220161f 100644
> --- a/arch/riscv/kernel/cpufeature.c
> +++ b/arch/riscv/kernel/cpufeature.c
> @@ -253,16 +253,13 @@ void __init riscv_fill_hwcap(void)
>  #ifdef CONFIG_RISCV_ALTERNATIVE
>  static bool __init_or_module cpufeature_probe_svpbmt(unsigned int stage)
>  {
> -#ifdef CONFIG_RISCV_ISA_SVPBMT
> -       switch (stage) {
> -       case RISCV_ALTERNATIVES_EARLY_BOOT:
> +       if (!IS_ENABLED(CONFIG_RISCV_ISA_SVPBMT))
>                 return false;
> -       default:
> -               return riscv_isa_extension_available(NULL, SVPBMT);
> -       }
> -#endif
>
> -       return false;
> +       if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)
> +               return false;
> +
> +       return riscv_isa_extension_available(NULL, SVPBMT);
>  }
>
>  static bool __init_or_module cpufeature_probe_zicbom(unsigned int stage)
> --
> 2.35.1
>


-- 
Best Regards
 Guo Ren

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