lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAJF2gTSekwXtdAGArPWiWshSDZuPH569jHBJZkpcf9JPdvS7hA@mail.gmail.com>
Date:   Sun, 4 Sep 2022 17:01:20 +0800
From:   Guo Ren <guoren@...nel.org>
To:     kernel test robot <lkp@...el.com>
Cc:     arnd@...db.de, palmer@...osinc.com, tglx@...utronix.de,
        peterz@...radead.org, luto@...nel.org, kbuild-all@...ts.01.org,
        linux-arch@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-riscv@...ts.infradead.org,
        Guo Ren <guoren@...ux.alibaba.com>,
        Huacai Chen <chenhuacai@...nel.org>
Subject: Re: [PATCH 1/3] riscv: convert to generic entry

The problem is the robot only picks one of my patch series.

git:(8390e92d0bcc) git log --oneline -8
8390e92d0bcc (HEAD) riscv: convert to generic entry
b224d265f838 soc: document merges
a10b904f72e1 Merge branch 'arm/soc' into for-next
566e373fe047 arm64: Kconfig.platforms: Group NXP platforms together
96796c914b84 arm64: Kconfig.platforms: Re-organized Broadcom menu
3779852e05c7 Merge branch 'arm/defconfig' into for-next
646e8ad3e676 Merge branch 'arm/drivers' into for-next
086e9b3719ae Merge branch 'arm/dt' into for-next

After cherry-pick all patches, all is right:
27642008ec1f (HEAD) riscv: compat_syscall_table: Fixup compile warning
afcaaabc38e0 riscv: elf_kexec: Fixup compile warning
741c29016482 riscv: Support HAVE_SOFTIRQ_ON_OWN_STACK
4eb9469a3bc8 riscv: Support HAVE_IRQ_EXIT_ON_IRQ_STACK
a372b565b7c9 riscv: convert to generic entry
2d228d709c92 riscv: ptrace: Remove duplicate operation
b224d265f838 soc: document merges
a10b904f72e1 Merge branch 'arm/soc' into for-next

If you want to try the riscv generic entry, please use the
v6.0-rc3-based branch [1].

[1]: https://github.com/guoren83/linux/tree/generic_entry_v2

On Sun, Sep 4, 2022 at 3:39 PM kernel test robot <lkp@...el.com> wrote:
>
> Hi,
>
> I love your patch! Yet something to improve:
>
> [auto build test ERROR on soc/for-next]
> [also build test ERROR on linus/master v6.0-rc3 next-20220901]
> [If your patch is applied to the wrong git tree, kindly drop us a note.
> And when submitting patch, we suggest to use '--base' as documented in
> https://git-scm.com/docs/git-format-patch#_base_tree_information]
>
> url:    https://github.com/intel-lab-lkp/linux/commits/guoren-kernel-org/riscv-Add-GENERIC_ENTRY-IRQ_STACKS-support/20220904-003954
> base:   https://git.kernel.org/pub/scm/linux/kernel/git/soc/soc.git for-next
> config: riscv-rv32_defconfig
> compiler: riscv32-linux-gcc (GCC) 12.1.0
> reproduce (this is a W=1 build):
>         wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
>         chmod +x ~/bin/make.cross
>         # https://github.com/intel-lab-lkp/linux/commit/8390e92d0bcc635f457df18c8c1baefc78a94e48
>         git remote add linux-review https://github.com/intel-lab-lkp/linux
>         git fetch --no-tags linux-review guoren-kernel-org/riscv-Add-GENERIC_ENTRY-IRQ_STACKS-support/20220904-003954
>         git checkout 8390e92d0bcc635f457df18c8c1baefc78a94e48
>         # save the config file
>         mkdir build_dir && cp config build_dir/.config
>         COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=riscv SHELL=/bin/bash
>
> If you fix the issue, kindly add following tag where applicable
> Reported-by: kernel test robot <lkp@...el.com>
>
> All errors (new ones prefixed by >>):
>
>    arch/riscv/kernel/sys_riscv.c:80:17: warning: no previous prototype for 'do_sys_ecall_u' [-Wmissing-prototypes]
>       80 | asmlinkage void do_sys_ecall_u(struct pt_regs *regs)
>          |                 ^~~~~~~~~~~~~~
>    arch/riscv/kernel/sys_riscv.c: In function 'do_sys_ecall_u':
> >> arch/riscv/kernel/sys_riscv.c:83:39: error: 'SR_UXL' undeclared (first use in this function); did you mean 'SR_XS'?
>       83 |         ulong sr_uxl = regs->status & SR_UXL;
>          |                                       ^~~~~~
>          |                                       SR_XS
>    arch/riscv/kernel/sys_riscv.c:83:39: note: each undeclared identifier is reported only once for each function it appears in
> >> arch/riscv/kernel/sys_riscv.c:91:23: error: 'SR_UXL_32' undeclared (first use in this function)
>       91 |         if (sr_uxl == SR_UXL_32)
>          |                       ^~~~~~~~~
>
>
> vim +83 arch/riscv/kernel/sys_riscv.c
>
>     79
>     80  asmlinkage void do_sys_ecall_u(struct pt_regs *regs)
>     81  {
>     82          syscall_t syscall;
>   > 83          ulong sr_uxl = regs->status & SR_UXL;
>     84          ulong nr = regs->a7;
>     85
>     86          regs->epc += 4;
>     87          regs->orig_a0 = regs->a0;
>     88          regs->a0 = -ENOSYS;
>     89
>     90          nr = syscall_enter_from_user_mode(regs, nr);
>   > 91          if (sr_uxl == SR_UXL_32)
>
> --
> 0-DAY CI Kernel Test Service
> https://01.org/lkp



-- 
Best Regards
 Guo Ren

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ