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Message-ID: <20220908212102.GA3361862-robh@kernel.org>
Date:   Thu, 8 Sep 2022 16:21:02 -0500
From:   Rob Herring <robh@...nel.org>
To:     Zong Li <zong.li@...ive.com>
Cc:     linux-riscv@...ts.infradead.org, conor.dooley@...rochip.com,
        palmer@...belt.com, krzysztof.kozlowski+dt@...aro.org,
        greentime.hu@...ive.com, robh+dt@...nel.org,
        linux-edac@...r.kernel.org, paul.walmsley@...ive.com,
        ben.dooks@...ive.com, linux-kernel@...r.kernel.org,
        aou@...s.berkeley.edu, bp@...en8.de, devicetree@...r.kernel.org
Subject: Re: [PATCH v2 1/6] dt-bindings: sifive-ccache: change Sifive L2
 cache to Composable cache

On Mon, 05 Sep 2022 08:31:20 +0000, Zong Li wrote:
> Since composable cache may be L3 cache if private L2 cache exists, we
> should use its original name Composable cache to prevent confusion.
> 
> Signed-off-by: Zong Li <zong.li@...ive.com>
> Suggested-by: Conor Dooley <conor.dooley@...rochip.com>
> Suggested-by: Ben Dooks <ben.dooks@...ive.com>
> ---
>  ...five-l2-cache.yaml => sifive,ccache0.yaml} | 28 +++++++++++++++----
>  1 file changed, 23 insertions(+), 5 deletions(-)
>  rename Documentation/devicetree/bindings/riscv/{sifive-l2-cache.yaml => sifive,ccache0.yaml} (83%)
> 

Reviewed-by: Rob Herring <robh@...nel.org>

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