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Message-ID: <ac348009-97bd-919c-3b1a-b12c4d7d5153@microchip.com>
Date:   Thu, 8 Sep 2022 06:47:04 +0000
From:   <Claudiu.Beznea@...rochip.com>
To:     <Conor.Dooley@...rochip.com>, <mturquette@...libre.com>,
        <sboyd@...nel.org>, <robh+dt@...nel.org>,
        <krzysztof.kozlowski+dt@...aro.org>, <palmer@...belt.com>,
        <Daire.McNamara@...rochip.com>
CC:     <paul.walmsley@...ive.com>, <aou@...s.berkeley.edu>,
        <linux-clk@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <linux-riscv@...ts.infradead.org>
Subject: Re: [PATCH v4 10/13] clk: microchip: mpfs: delete 2 line
 mpfs_clk_register_foo()

On 30.08.2022 15:52, Conor Dooley wrote:
> The register functions are now comprised of only a single operation
> each and no longer add anything to the driver. Delete them.
> 
> Reviewed-by: Daire McNamara <daire.mcnamara@...rochip.com>
> Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>

Reviewed-by: Claudiu Beznea <claudiu.beznea@...rochip.com>


> ---
>  drivers/clk/microchip/clk-mpfs.c | 33 ++++++--------------------------
>  1 file changed, 6 insertions(+), 27 deletions(-)
> 
> diff --git a/drivers/clk/microchip/clk-mpfs.c b/drivers/clk/microchip/clk-mpfs.c
> index 60e1e82912fe..538cb589d232 100644
> --- a/drivers/clk/microchip/clk-mpfs.c
> +++ b/drivers/clk/microchip/clk-mpfs.c
> @@ -203,14 +203,6 @@ static struct mpfs_msspll_hw_clock mpfs_msspll_clks[] = {
>  		MSSPLL_FBDIV_WIDTH, 0, REG_MSSPLL_SSCG_2_CR),
>  };
>  
> -static int mpfs_clk_register_msspll(struct device *dev, struct mpfs_msspll_hw_clock *msspll_hw,
> -				    void __iomem *base)
> -{
> -	msspll_hw->base = base;
> -
> -	return devm_clk_hw_register(dev, &msspll_hw->hw);
> -}
> -
>  static int mpfs_clk_register_mssplls(struct device *dev, struct mpfs_msspll_hw_clock *msspll_hws,
>  				     unsigned int num_clks, struct mpfs_clock_data *data)
>  {
> @@ -220,7 +212,8 @@ static int mpfs_clk_register_mssplls(struct device *dev, struct mpfs_msspll_hw_c
>  	for (i = 0; i < num_clks; i++) {
>  		struct mpfs_msspll_hw_clock *msspll_hw = &msspll_hws[i];
>  
> -		ret = mpfs_clk_register_msspll(dev, msspll_hw, data->msspll_base);
> +		msspll_hw->base = data->msspll_base;
> +		ret = devm_clk_hw_register(dev, &msspll_hw->hw);
>  		if (ret)
>  			return dev_err_probe(dev, ret, "failed to register msspll id: %d\n",
>  					     CLK_MSSPLL);
> @@ -314,14 +307,6 @@ static struct mpfs_cfg_hw_clock mpfs_cfg_clks[] = {
>  	}
>  };
>  
> -static int mpfs_clk_register_cfg(struct device *dev, struct mpfs_cfg_hw_clock *cfg_hw,
> -				 void __iomem *base)
> -{
> -	cfg_hw->cfg.reg = base + cfg_hw->reg_offset;
> -
> -	return devm_clk_hw_register(dev, &cfg_hw->hw);
> -}
> -
>  static int mpfs_clk_register_cfgs(struct device *dev, struct mpfs_cfg_hw_clock *cfg_hws,
>  				  unsigned int num_clks, struct mpfs_clock_data *data)
>  {
> @@ -331,7 +316,8 @@ static int mpfs_clk_register_cfgs(struct device *dev, struct mpfs_cfg_hw_clock *
>  	for (i = 0; i < num_clks; i++) {
>  		struct mpfs_cfg_hw_clock *cfg_hw = &cfg_hws[i];
>  
> -		ret = mpfs_clk_register_cfg(dev, cfg_hw, data->base);
> +		cfg_hw->cfg.reg = data->base + cfg_hw->reg_offset;
> +		ret = devm_clk_hw_register(dev, &cfg_hw->hw);
>  		if (ret)
>  			return dev_err_probe(dev, ret, "failed to register clock id: %d\n",
>  					     cfg_hw->id);
> @@ -454,14 +440,6 @@ static struct mpfs_periph_hw_clock mpfs_periph_clks[] = {
>  	CLK_PERIPH(CLK_CFM, "clk_periph_cfm", PARENT_CLK(AHB), 29, 0),
>  };
>  
> -static int mpfs_clk_register_periph(struct device *dev, struct mpfs_periph_hw_clock *periph_hw,
> -				    void __iomem *base)
> -{
> -	periph_hw->periph.reg = base + REG_SUBBLK_CLOCK_CR;
> -
> -	return devm_clk_hw_register(dev, &periph_hw->hw);
> -}
> -
>  static int mpfs_clk_register_periphs(struct device *dev, struct mpfs_periph_hw_clock *periph_hws,
>  				     int num_clks, struct mpfs_clock_data *data)
>  {
> @@ -471,7 +449,8 @@ static int mpfs_clk_register_periphs(struct device *dev, struct mpfs_periph_hw_c
>  	for (i = 0; i < num_clks; i++) {
>  		struct mpfs_periph_hw_clock *periph_hw = &periph_hws[i];
>  
> -		ret = mpfs_clk_register_periph(dev, periph_hw, data->base);
> +		periph_hw->periph.reg = data->base + REG_SUBBLK_CLOCK_CR;
> +		ret = devm_clk_hw_register(dev, &periph_hw->hw);
>  		if (ret)
>  			return dev_err_probe(dev, ret, "failed to register clock id: %d\n",
>  					     periph_hw->id);

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