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Message-Id: <20220908125444.30727-1-andriy.shevchenko@linux.intel.com>
Date: Thu, 8 Sep 2022 15:54:44 +0300
From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To: Mark Brown <broonie@...nel.org>, linux-spi@...r.kernel.org,
linux-kernel@...r.kernel.org
Cc: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Subject: [PATCH v1 1/1] spi: Group cs_change and cs_off flags together in struct spi_transfer
The commit 5e0531f6b90a ("spi: Add capability to perform some transfer
with chipselect off") added a new flag but squezed it into a wrong
group of struct spi_transfer members (note that SPI_NBITS_* are macros
for easier interpretation of the tx_nbits and rx_nbits bitfields.
Group cs_change and cs_off flags together.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
---
include/linux/spi/spi.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index e111cf5e77de..bffcad4e7d6e 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -959,10 +959,10 @@ struct spi_transfer {
struct sg_table rx_sg;
unsigned dummy_data:1;
+ unsigned cs_off:1;
unsigned cs_change:1;
unsigned tx_nbits:3;
unsigned rx_nbits:3;
- unsigned cs_off:1;
#define SPI_NBITS_SINGLE 0x01 /* 1bit transfer */
#define SPI_NBITS_DUAL 0x02 /* 2bits transfer */
#define SPI_NBITS_QUAD 0x04 /* 4bits transfer */
--
2.35.1
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