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Message-ID: <Yx8nI/AMk/Gu8o/J@pendragon.ideasonboard.com>
Date:   Mon, 12 Sep 2022 15:33:39 +0300
From:   Laurent Pinchart <laurent.pinchart@...asonboard.com>
To:     Robert Foss <robert.foss@...aro.org>
Cc:     andrzej.hajda@...el.com, narmstrong@...libre.com, jonas@...boo.se,
        jernej.skrabec@...il.com, airlied@...ux.ie, daniel@...ll.ch,
        robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        dianders@...omium.org, lkundrak@...sk,
        dri-devel@...ts.freedesktop.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org,
        Chris Morgan <macromorgan@...mail.com>, tzimmermann@...e.de,
        javierm@...hat.com, maarten.lankhorst@...ux.intel.com,
        mripard@...nel.org
Subject: Re: [PATCH v1 0/2] Revert chrontel-ch7033 byteswap order series

Hi Rob,

On Mon, Sep 12, 2022 at 01:38:54PM +0200, Robert Foss wrote:
> After applying the "chrontel-ch7033: Add byteswap order option" series,
> Laurent reported an issues with the approach. Since no fix has been submitted
> for the issues outlined in time for the next kernel release, I'd like to
> revert this series for now.
> 
> Just to be clear I would very much like to see a v3 of this[1] series, where the
> issues outlined have been fixed.
> 
> [1] https://lore.kernel.org/all/20220902153906.31000-1-macroalpha82@gmail.com/
> 
> Robert Foss (2):
>   Revert "dt-bindings: Add byteswap order to chrontel ch7033"
>   Revert "drm/bridge: ti-sn65dsi86: Implement bridge connector
>     operations for DP"

For the series,

Reviewed-by: Laurent Pinchart <laurent.pinchart@...asonboard.com>

>  .../display/bridge/chrontel,ch7033.yaml       | 13 ---------
>  drivers/gpu/drm/bridge/ti-sn65dsi86.c         | 28 -------------------
>  2 files changed, 41 deletions(-)

-- 
Regards,

Laurent Pinchart

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