[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <BL1PR12MB5801030CBB94899D9F1D297484479@BL1PR12MB5801.namprd12.prod.outlook.com>
Date: Tue, 13 Sep 2022 19:14:49 +0000
From: "Nowshadi, Saeed" <saeed.nowshadi@....com>
To: Alex Helms <alexander.helms.jy@...esas.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>
CC: "robh+dt@...nel.org" <robh+dt@...nel.org>,
"sboyd@...nel.org" <sboyd@...nel.org>,
"mturquette@...libre.com" <mturquette@...libre.com>,
"michal.simek@...inx.com" <michal.simek@...inx.com>
Subject: RE: [PATCH v2 0/2] Renesas Versaclock7 Bindings and Clock Driver
Tested-by: Saeed Nowshadi <saeed.nowshadi@....com>
Thanks,
Saeed.
> -----Original Message-----
> From: Alex Helms <alexander.helms.jy@...esas.com>
> Sent: Monday, September 12, 2022 11:36 AM
> To: linux-kernel@...r.kernel.org; devicetree@...r.kernel.org; linux-
> clk@...r.kernel.org
> Cc: robh+dt@...nel.org; sboyd@...nel.org; mturquette@...libre.com;
> alexander.helms.jy@...esas.com; michal.simek@...inx.com; Nowshadi,
> Saeed <saeed.nowshadi@....com>
> Subject: [PATCH v2 0/2] Renesas Versaclock7 Bindings and Clock Driver
>
> Device tree bindings and a common clock framework device driver for the
> Renesas VersaClock7 clock generator family.
> ---
> Changelog v2:
> - Index to output number varies based on which VC7 chip model is used.
> Correct bank to output reference requires converting index to output
> number
> based on chip model.
> - Differentiate between multiple instance of clock nodes by using
> the value of 'clock-output-names' property.
>
> Alex Helms (2):
> dt-bindings: Renesas versaclock7 device tree bindings
> clk: Renesas versaclock7 ccf device driver
>
> .../bindings/clock/renesas,versaclock7.yaml | 64 +
> MAINTAINERS | 6 +
> drivers/clk/Kconfig | 9 +
> drivers/clk/Makefile | 1 +
> drivers/clk/clk-versaclock7.c | 1292 +++++++++++++++++
> 5 files changed, 1372 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/clock/renesas,versaclock7.yaml
> create mode 100755 drivers/clk/clk-versaclock7.c
>
>
> base-commit: f443e374ae131c168a065ea1748feac6b2e76613
> --
> 2.30.2
Powered by blists - more mailing lists