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Message-Id: <20220913140419.637634768@linuxfoundation.org>
Date: Tue, 13 Sep 2022 16:04:58 +0200
From: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To: linux-kernel@...r.kernel.org
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
stable@...r.kernel.org, Gabe Teeger <Gabe.Teeger@....com>,
Solomon Chiu <solomon.chiu@....com>,
Saaem Rizvi <SyedSaaem.Rizvi@....com>,
Daniel Wheeler <daniel.wheeler@....com>,
Alex Deucher <alexander.deucher@....com>
Subject: [PATCH 5.19 192/192] drm/amd/display: Removing assert statements for Linux
From: Saaem Rizvi <SyedSaaem.Rizvi@....com>
commit 149f6d1a6035a7aa6595ac6eeb9c8f566b2103cd upstream.
[WHY]
Assert statements causing several bugs on Linux DM
[HOW]
Removing assert statement for Linux DM
(ASSERT(result == VBIOSSMC_Result_OK)). Also adding
logging statements for setting dcfclk.
Bug: https://bugzilla.kernel.org/show_bug.cgi?id=216092
Fixes: c1b972a18d05 ("drm/amd/display: Insert pulling smu busy status before sending another request")
Reviewed-by: Gabe Teeger <Gabe.Teeger@....com>
Acked-by: Solomon Chiu <solomon.chiu@....com>
Signed-off-by: Saaem Rizvi <SyedSaaem.Rizvi@....com>
Tested-by: Daniel Wheeler <daniel.wheeler@....com>
Signed-off-by: Alex Deucher <alexander.deucher@....com>
Signed-off-by: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
---
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c | 8 ++++++--
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/dcn301_smu.c | 7 ++++++-
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.c | 8 ++++++--
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c | 8 ++++++--
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_smu.c | 8 ++++++--
5 files changed, 30 insertions(+), 9 deletions(-)
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c
@@ -101,9 +101,9 @@ static int rn_vbios_smu_send_msg_with_pa
uint32_t result;
result = rn_smu_wait_for_response(clk_mgr, 10, 200000);
- ASSERT(result == VBIOSSMC_Result_OK);
- smu_print("SMU response after wait: %d\n", result);
+ if (result != VBIOSSMC_Result_OK)
+ smu_print("SMU Response was not OK. SMU response after wait received is: %d\n", result);
if (result == VBIOSSMC_Status_BUSY) {
return -1;
@@ -188,6 +188,10 @@ int rn_vbios_smu_set_hard_min_dcfclk(str
VBIOSSMC_MSG_SetHardMinDcfclkByFreq,
khz_to_mhz_ceil(requested_dcfclk_khz));
+#ifdef DBG
+ smu_print("actual_dcfclk_set_mhz %d is set to : %d\n", actual_dcfclk_set_mhz, actual_dcfclk_set_mhz * 1000);
+#endif
+
return actual_dcfclk_set_mhz * 1000;
}
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/dcn301_smu.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/dcn301_smu.c
@@ -102,7 +102,8 @@ static int dcn301_smu_send_msg_with_para
result = dcn301_smu_wait_for_response(clk_mgr, 10, 200000);
- smu_print("SMU response after wait: %d\n", result);
+ if (result != VBIOSSMC_Result_OK)
+ smu_print("SMU Response was not OK. SMU response after wait received is: %d\n", result);
if (result == VBIOSSMC_Status_BUSY) {
return -1;
@@ -179,6 +180,10 @@ int dcn301_smu_set_hard_min_dcfclk(struc
VBIOSSMC_MSG_SetHardMinDcfclkByFreq,
khz_to_mhz_ceil(requested_dcfclk_khz));
+#ifdef DBG
+ smu_print("actual_dcfclk_set_mhz %d is set to : %d\n", actual_dcfclk_set_mhz, actual_dcfclk_set_mhz * 1000);
+#endif
+
return actual_dcfclk_set_mhz * 1000;
}
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.c
@@ -108,9 +108,9 @@ static int dcn31_smu_send_msg_with_param
uint32_t result;
result = dcn31_smu_wait_for_response(clk_mgr, 10, 200000);
- ASSERT(result == VBIOSSMC_Result_OK);
- smu_print("SMU response after wait: %d\n", result);
+ if (result != VBIOSSMC_Result_OK)
+ smu_print("SMU Response was not OK. SMU response after wait received is: %d\n", result);
if (result == VBIOSSMC_Status_BUSY) {
return -1;
@@ -202,6 +202,10 @@ int dcn31_smu_set_hard_min_dcfclk(struct
VBIOSSMC_MSG_SetHardMinDcfclkByFreq,
khz_to_mhz_ceil(requested_dcfclk_khz));
+#ifdef DBG
+ smu_print("actual_dcfclk_set_mhz %d is set to : %d\n", actual_dcfclk_set_mhz, actual_dcfclk_set_mhz * 1000);
+#endif
+
return actual_dcfclk_set_mhz * 1000;
}
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_smu.c
@@ -136,9 +136,9 @@ static int dcn315_smu_send_msg_with_para
uint32_t result;
result = dcn315_smu_wait_for_response(clk_mgr, 10, 200000);
- ASSERT(result == VBIOSSMC_Result_OK);
- smu_print("SMU response after wait: %d\n", result);
+ if (result != VBIOSSMC_Result_OK)
+ smu_print("SMU Response was not OK. SMU response after wait received is: %d\n", result);
if (result == VBIOSSMC_Status_BUSY) {
return -1;
@@ -205,6 +205,10 @@ int dcn315_smu_set_hard_min_dcfclk(struc
VBIOSSMC_MSG_SetHardMinDcfclkByFreq,
khz_to_mhz_ceil(requested_dcfclk_khz));
+#ifdef DBG
+ smu_print("actual_dcfclk_set_mhz %d is set to : %d\n", actual_dcfclk_set_mhz, actual_dcfclk_set_mhz * 1000);
+#endif
+
return actual_dcfclk_set_mhz * 1000;
}
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_smu.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_smu.c
@@ -124,9 +124,9 @@ static int dcn316_smu_send_msg_with_para
uint32_t result;
result = dcn316_smu_wait_for_response(clk_mgr, 10, 200000);
- ASSERT(result == VBIOSSMC_Result_OK);
- smu_print("SMU response after wait: %d\n", result);
+ if (result != VBIOSSMC_Result_OK)
+ smu_print("SMU Response was not OK. SMU response after wait received is: %d\n", result);
if (result == VBIOSSMC_Status_BUSY) {
return -1;
@@ -191,6 +191,10 @@ int dcn316_smu_set_hard_min_dcfclk(struc
VBIOSSMC_MSG_SetHardMinDcfclkByFreq,
khz_to_mhz_ceil(requested_dcfclk_khz));
+#ifdef DBG
+ smu_print("actual_dcfclk_set_mhz %d is set to : %d\n", actual_dcfclk_set_mhz, actual_dcfclk_set_mhz * 1000);
+#endif
+
return actual_dcfclk_set_mhz * 1000;
}
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