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Message-ID: <1663135386-26270-1-git-send-email-quic_sibis@quicinc.com>
Date: Wed, 14 Sep 2022 11:33:04 +0530
From: Sibi Sankar <quic_sibis@...cinc.com>
To: <andersson@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
<robh+dt@...nel.org>, <jassisinghbrar@...il.com>,
<manivannan.sadhasivam@...aro.org>
CC: <agross@...nel.org>, <linux-arm-msm@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<konrad.dybcio@...ainline.org>,
Sibi Sankar <quic_sibis@...cinc.com>
Subject: [PATCH 0/2] Add support for CPUCP mailbox controller
Add support for CPUSS Control Processor (CPUCP) mailbox controller
which enables communication between AP and CPUCP by acting as a
doorbell between them.
Sibi Sankar (2):
dt-bindings: mailbox: Add dt binding for QTI CPUCP mailbox controller
mailbox: Add support for QTI CPUCP mailbox controller
.../bindings/mailbox/qcom,cpucp-mbox.yaml | 51 ++++++
drivers/mailbox/Kconfig | 9 ++
drivers/mailbox/Makefile | 2 +
drivers/mailbox/qcom-cpucp-mbox.c | 176 +++++++++++++++++++++
4 files changed, 238 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml
create mode 100644 drivers/mailbox/qcom-cpucp-mbox.c
--
2.7.4
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