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Message-Id: <20220918055940.24726-1-tjytimi@163.com>
Date: Sun, 18 Sep 2022 13:59:40 +0800
From: Jinyu Tang <tjytimi@....com>
To: paul.walmsley@...ive.com, ajones@...tanamicro.com,
palmer@...belt.com, aou@...s.berkeley.edu,
conor.dooley@...rochip.com, anup@...infault.org,
alexandre.ghiti@...onical.com, guoren@...nel.org,
akpm@...ux-foundation.org, heiko@...ech.de, tongtiangen@...wei.com,
sunnanyong@...wei.com
Cc: linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
falcon@...ylab.org, tjytimi@....com
Subject: [PATCH v2] riscv: support update_mmu_tlb() for riscv
Add macro definition to support updata_mmu_tlb() for riscv,
this function is from commit:7df676974359 ("mm/memory.c:Update
local TLB if PTE entry exists").
Signed-off-by: Jinyu Tang <tjytimi@....com>
Reviewed-by: Andrew Jones <ajones@...tanamicro.com>
---
v1 -> v2:
Change the format with the help from Andrew Jones and Conor Dooley.
arch/riscv/include/asm/pgtable.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
index 7ec936910a96..c61ae83aadee 100644
--- a/arch/riscv/include/asm/pgtable.h
+++ b/arch/riscv/include/asm/pgtable.h
@@ -418,6 +418,9 @@ static inline void update_mmu_cache(struct vm_area_struct *vma,
local_flush_tlb_page(address);
}
+#define __HAVE_ARCH_UPDATE_MMU_TLB
+#define update_mmu_tlb update_mmu_cache
+
static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
unsigned long address, pmd_t *pmdp)
{
--
2.30.2
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