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Message-ID: <063eb521-3296-e604-5a5e-1382aabbefba@amd.com>
Date: Mon, 19 Sep 2022 13:38:18 +0200
From: Christian König <christian.koenig@....com>
To: Ville Syrjälä <ville.syrjala@...ux.intel.com>,
Christian König <ckoenig.leichtzumerken@...il.com>
Cc: "Yadav, Arvind" <arvyadav@....com>,
Arvind Yadav <Arvind.Yadav@....com>, andrey.grodzovsky@....com,
shashank.sharma@....com, amaranath.somalapuram@....com,
Arunpravin.PaneerSelvam@....com, sumit.semwal@...aro.org,
gustavo@...ovan.org, airlied@...ux.ie, daniel@...ll.ch,
linux-media@...r.kernel.org, dri-devel@...ts.freedesktop.org,
linaro-mm-sig@...ts.linaro.org, linux-kernel@...r.kernel.org
Subject: Re: [Linaro-mm-sig] Re: [PATCH v4 0/6] dma-buf: Check status of
enable-signaling bit on debug
Am 19.09.22 um 13:26 schrieb Ville Syrjälä:
> On Sat, Sep 17, 2022 at 05:18:40PM +0200, Christian König wrote:
>> Am 17.09.22 um 08:17 schrieb Ville Syrjälä:
>>> On Thu, Sep 15, 2022 at 06:05:30PM +0200, Christian König wrote:
>>>> Am 15.09.22 um 15:02 schrieb Yadav, Arvind:
>>>>> On 9/15/2022 5:37 PM, Christian König wrote:
>>>>>> Is that sufficient to allow running a desktop on amdgpu with the
>>>>>> extra check enabled? If yes that would be quite a milestone.
>>>>>>
>>>>> Yes, It is running on amdgpu with extra config enabled.
>>>> In this case I will start pushing the patches to drm-misc-next. I'm just
>>>> going to leave out the last one until the IGT tests are working as well.
>>> ffs Christian. intel CI blew up yet again:
>>> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fintel-gfx-ci.01.org%2Ftree%2Fdrm-tip%2FCI_DRM_12146%2Fshard-glk7%2Figt%40kms_plane_lowres%40tiling-y%40pipe-c-hdmi-a-2.html&data=05%7C01%7Cchristian.koenig%40amd.com%7C31a4fd82204b4eada97708da9a31d922%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637991836142423547%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=TqPiX483fF%2FUdZHTjle8k5XplcF3DVaZBs0IzQlNYck%3D&reserved=0
>>>
>>> The last time (some ttm thing) was just a week or two ago,
>>> so it's really getting tiresome watching you push entirely
>>> untested stuff all the time. Would be really helpful if you
>>> finally started to do/require premerge testing.
>> Well first of all sorry for causing trouble, but as I wrote above I
>> intentionally left out the last one to *not* break the IGT tests.
>>
>> The patches pushed so far where just updating a bunch of corner cases
>> and fixing the selftests.
>>
>> Do you have any more insight why that should affect the IGT tests?
> I have no idea. You have the oopses from pstore right there.
> Did you even look at them?
Ah! Sorry, I didn't see that there were additional links to the oopses.
Yeah, the problem is obvious with them.
The check for the signaled bit comes before grabbing the lock. This only
worked before because of the __dma_fence_enable_sw_signaling() shortcut.
Going to send a fix for this in a minute.
Thanks,
Christian.
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