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Message-ID: <1663674495-25748-1-git-send-email-quic_c_skakit@quicinc.com>
Date: Tue, 20 Sep 2022 17:18:15 +0530
From: Satya Priya <quic_c_skakit@...cinc.com>
To: Rob Herring <robh@...nel.org>,
Bjorn Andersson <bjorn.andersson@...nel.org>
CC: <mka@...omium.org>, Stephen Boyd <swboyd@...omium.org>,
Andy Gross <agross@...nel.org>, <devicetree@...r.kernel.org>,
<linux-arm-msm@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<quic_tdas@...cinc.com>, <quic_c_skakit@...cinc.com>,
<linux-clk@...r.kernel.org>
Subject: [PATCH] arm64: dts: qcom: sc7280: Add the reset reg for lpass audiocc on SC7280
Add the reset register offset for clock gating.
Fixes: 9499240d15f2 ("arm64: dts: qcom: sc7280: Add lpasscore & lpassaudio clock controllers")
Signed-off-by: Satya Priya <quic_c_skakit@...cinc.com>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 8d807b7..353c137 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -2295,7 +2295,8 @@
lpass_audiocc: clock-controller@...0000 {
compatible = "qcom,sc7280-lpassaudiocc";
- reg = <0 0x03300000 0 0x30000>;
+ reg = <0 0x03300000 0 0x30000>,
+ <0 0x032a9000 0 0x1000>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&lpass_aon LPASS_AON_CC_MAIN_RCG_CLK_SRC>;
clock-names = "bi_tcxo", "lpass_aon_cc_main_rcg_clk_src";
--
2.7.4
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