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Message-ID: <36adf055-d963-1034-919a-97f3eeff02ef@linaro.org>
Date:   Wed, 21 Sep 2022 09:51:02 +0200
From:   Neil Armstrong <neil.armstrong@...aro.org>
To:     Satya Priya <quic_c_skakit@...cinc.com>,
        Rob Herring <robh@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...nel.org>
Cc:     mka@...omium.org, Stephen Boyd <swboyd@...omium.org>,
        Andy Gross <agross@...nel.org>, devicetree@...r.kernel.org,
        linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
        quic_tdas@...cinc.com, linux-clk@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: qcom: sc7280: Add the reset reg for lpass
 audiocc on SC7280

On 20/09/2022 13:48, Satya Priya wrote:
> Add the reset register offset for clock gating.
> 
> Fixes: 9499240d15f2 ("arm64: dts: qcom: sc7280: Add lpasscore & lpassaudio clock controllers")
> Signed-off-by: Satya Priya <quic_c_skakit@...cinc.com>
> ---
>   arch/arm64/boot/dts/qcom/sc7280.dtsi | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index 8d807b7..353c137 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -2295,7 +2295,8 @@
>   
>   		lpass_audiocc: clock-controller@...0000 {
>   			compatible = "qcom,sc7280-lpassaudiocc";
> -			reg = <0 0x03300000 0 0x30000>;
> +			reg = <0 0x03300000 0 0x30000>,
> +			      <0 0x032a9000 0 0x1000>;
>   			clocks = <&rpmhcc RPMH_CXO_CLK>,
>   			       <&lpass_aon LPASS_AON_CC_MAIN_RCG_CLK_SRC>;
>   			clock-names = "bi_tcxo", "lpass_aon_cc_main_rcg_clk_src";

Checked against the already merged bindings change adding the reset reg (be9439df2353).

Reviewed-by: Neil Armstrong <neil.armstrong@...aro.org>

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