linux-kernel - [PATCH 5.19 28/38] drm/i915/gt: Fix perf limit reasons bit positions

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Message-Id: <20220921153647.157448691@linuxfoundation.org>
Date:   Wed, 21 Sep 2022 17:46:12 +0200
From:   Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To:     linux-kernel@...r.kernel.org
Cc:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        stable@...r.kernel.org, Ashutosh Dixit <ashutosh.dixit@...el.com>,
        Andi Shyti <andi.shyti@...ux.intel.com>,
        Sujaritha Sundaresan <sujaritha.sundaresan@...el.com>,
        Matt Roper <matthew.d.roper@...el.com>,
        Joonas Lahtinen <joonas.lahtinen@...ux.intel.com>,
        Rodrigo Vivi <rodrigo.vivi@...el.com>
Subject: [PATCH 5.19 28/38] drm/i915/gt: Fix perf limit reasons bit positions

From: Ashutosh Dixit <ashutosh.dixit@...el.com>

commit d654f60898d56ffda461ef4ffd7bbe15159feb8d upstream.

Perf limit reasons bit positions were off by one.

Fixes: fa68bff7cf27 ("drm/i915/gt: Add sysfs throttle frequency interfaces")
Cc: stable@...r.kernel.org # v5.18+
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@...el.com>
Acked-by: Andi Shyti <andi.shyti@...ux.intel.com>
Reviewed-by: Sujaritha Sundaresan <sujaritha.sundaresan@...el.com>
Signed-off-by: Matt Roper <matthew.d.roper@...el.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220908155821.1662110-1-ashutosh.dixit@intel.com
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@...ux.intel.com>
(cherry picked from commit 60017f34fc334d1bb25476b0b0996b4073e76c90)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@...el.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
---
 drivers/gpu/drm/i915/i915_reg.h |   16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1849,14 +1849,14 @@
 
 #define GT0_PERF_LIMIT_REASONS		_MMIO(0x1381a8)
 #define   GT0_PERF_LIMIT_REASONS_MASK	0xde3
-#define   PROCHOT_MASK			REG_BIT(1)
-#define   THERMAL_LIMIT_MASK		REG_BIT(2)
-#define   RATL_MASK			REG_BIT(6)
-#define   VR_THERMALERT_MASK		REG_BIT(7)
-#define   VR_TDC_MASK			REG_BIT(8)
-#define   POWER_LIMIT_4_MASK		REG_BIT(9)
-#define   POWER_LIMIT_1_MASK		REG_BIT(11)
-#define   POWER_LIMIT_2_MASK		REG_BIT(12)
+#define   PROCHOT_MASK			REG_BIT(0)
+#define   THERMAL_LIMIT_MASK		REG_BIT(1)
+#define   RATL_MASK			REG_BIT(5)
+#define   VR_THERMALERT_MASK		REG_BIT(6)
+#define   VR_TDC_MASK			REG_BIT(7)
+#define   POWER_LIMIT_4_MASK		REG_BIT(8)
+#define   POWER_LIMIT_1_MASK		REG_BIT(10)
+#define   POWER_LIMIT_2_MASK		REG_BIT(11)
 
 #define CHV_CLK_CTL1			_MMIO(0x101100)
 #define VLV_CLK_CTL2			_MMIO(0x101104)