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Message-Id: <166378514628.18111.5147960761937324813.b4-ty@linaro.org>
Date:   Wed, 21 Sep 2022 20:32:36 +0200
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     mchehab@...nel.org, robh+dt@...nel.org,
        Tony Luck <tony.luck@...el.com>, michal.simek@...inx.com,
        Sergey.Semin@...kalelectronics.ru, manish.narani@...inx.com,
        krzysztof.kozlowski+dt@...aro.org, bp@...en8.de
Cc:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        linux-arm-kernel@...ts.infradead.org,
        punnaiah.choudary.kalluri@...inx.com, krzk@...nel.org,
        linux-edac@...r.kernel.org, linux-kernel@...r.kernel.org,
        rric@...nel.org, james.morse@....com,
        Alexey.Malahov@...kalelectronics.ru, dinguyen@...nel.org,
        robh@...nel.org, Michail.Ivanov@...kalelectronics.ru,
        devicetree@...r.kernel.org, Pavel.Parkhomenko@...kalelectronics.ru,
        fancer.lancer@...il.com
Subject: Re: (subset) [PATCH v2 14/19] dt-bindings: memory: snps: Detach Zynq DDRC controller support

On Sat, 10 Sep 2022 22:42:32 +0300, Serge Semin wrote:
> The Zynq A05 DDRC controller has nothing in common with DW uMCTL2 DDRC:
> the CSRs layout is absolutely different and it doesn't support IRQs unlike
> DW uMCTL2 DDR controller of all versions (v1.x, v2.x and v3.x). Thus there
> is no any reason to have these controllers described in the same bindings.
> Let's split the DT-schema up.
> 
> Note since the synopsys,ddrc-ecc.yaml schema describes the Synopsys DW
> uMCTL2 DDR controller only, we need to accordingly fix the device
> descriptions.
> 
> [...]

Applied, thanks!

[14/19] dt-bindings: memory: snps: Detach Zynq DDRC controller support
        https://git.kernel.org/krzk/linux-mem-ctrl/c/845081313632b6a27dff576cf102b4aecb4654cf

Best regards,
-- 
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>

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