linux-kernel - [PATCH v12 02/17] riscv: Extending cpufeature.c to detect V-extension

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Date:   Wed, 21 Sep 2022 14:43:44 -0700
From:   Chris Stillson <stillson@...osinc.com>
To:     unlisted-recipients:; (no To-header on input)
Cc:     Guo Ren <ren_guo@...ky.com>, Guo Ren <guoren@...ux.alibaba.com>,
        Anup Patel <anup@...infault.org>,
        Greentime Hu <greentime.hu@...ive.com>,
        Palmer Dabbelt <palmer@...osinc.com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Eric Biederman <ebiederm@...ssion.com>,
        Kees Cook <keescook@...omium.org>,
        Atish Patra <atishp@...shpatra.org>,
        Oleg Nesterov <oleg@...hat.com>,
        Heinrich Schuchardt <heinrich.schuchardt@...onical.com>,
        Guo Ren <guoren@...nel.org>,
        Conor Dooley <conor.dooley@...rochip.com>,
        Mayuresh Chitale <mchitale@...tanamicro.com>,
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        Suren Baghdasaryan <surenb@...gle.com>,
        Davidlohr Bueso <dave@...olabs.net>,
        linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
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Subject: [PATCH v12 02/17] riscv: Extending cpufeature.c to detect V-extension

From: Guo Ren <ren_guo@...ky.com>

Current cpufeature.c doesn't support detecting V-extension, because
"rv64" also contain a 'v' letter and we need to skip it.

Signed-off-by: Guo Ren <ren_guo@...ky.com>
Signed-off-by: Guo Ren <guoren@...ux.alibaba.com>
Reviewed-by: Anup Patel <anup@...infault.org>
Reviewed-by: Greentime Hu <greentime.hu@...ive.com>
Signed-off-by: Greentime Hu <greentime.hu@...ive.com>
Reviewed-by: Palmer Dabbelt <palmer@...osinc.com>
---
 arch/riscv/include/uapi/asm/hwcap.h | 1 +
 arch/riscv/kernel/cpufeature.c      | 1 +
 2 files changed, 2 insertions(+)

diff --git a/arch/riscv/include/uapi/asm/hwcap.h b/arch/riscv/include/uapi/asm/hwcap.h
index 46dc3f5ee99f..c52bb7bbbabe 100644
--- a/arch/riscv/include/uapi/asm/hwcap.h
+++ b/arch/riscv/include/uapi/asm/hwcap.h
@@ -21,5 +21,6 @@
 #define COMPAT_HWCAP_ISA_F	(1 << ('F' - 'A'))
 #define COMPAT_HWCAP_ISA_D	(1 << ('D' - 'A'))
 #define COMPAT_HWCAP_ISA_C	(1 << ('C' - 'A'))
+#define COMPAT_HWCAP_ISA_V	(1 << ('V' - 'A'))
 
 #endif /* _UAPI_ASM_RISCV_HWCAP_H */
diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
index 553d755483ed..8d4448c2d4f4 100644
--- a/arch/riscv/kernel/cpufeature.c
+++ b/arch/riscv/kernel/cpufeature.c
@@ -83,6 +83,7 @@ void __init riscv_fill_hwcap(void)
 	isa2hwcap['f'] = isa2hwcap['F'] = COMPAT_HWCAP_ISA_F;
 	isa2hwcap['d'] = isa2hwcap['D'] = COMPAT_HWCAP_ISA_D;
 	isa2hwcap['c'] = isa2hwcap['C'] = COMPAT_HWCAP_ISA_C;
+	isa2hwcap['v'] = isa2hwcap['V'] = COMPAT_HWCAP_ISA_V;
 
 	elf_hwcap = 0;
 
-- 
2.25.1