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Date: Mon, 26 Sep 2022 11:13:51 +0200 From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com> To: xinlei.lee@...iatek.com, thierry.reding@...il.com, u.kleine-koenig@...gutronix.de, matthias.bgg@...il.com Cc: linux-pwm@...r.kernel.org, linux-mediatek@...ts.infradead.org, linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org, Project_Global_Chrome_Upstream_Group@...iatek.com, jitao.shi@...iatek.com Subject: Re: [PATCH,v2] pwm: mtk-disp: Fix the parameters calculated by the enabled flag of disp_pwm Il 23/09/22 14:06, xinlei.lee@...iatek.com ha scritto: > From: xinlei lee <xinlei.lee@...iatek.com> > > In the original mtk_disp_pwm_get_state() function, the result of reading > con0 & BIT(0) is enabled as disp_pwm. > In order to conform to the register table, we should use the disp_pwm > base address as the enabled judgment. > > Fixes: 3f2b16734914 ("pwm: mtk-disp: Implement atomic API .get_state()") > > Signed-off-by: xinlei lee <xinlei.lee@...iatek.com> > --- > Base on the branch of Linux-next/master. > > change since v1: > 1. Modify the way to set disp_pwm enbale. > --- > --- > drivers/pwm/pwm-mtk-disp.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/pwm/pwm-mtk-disp.c b/drivers/pwm/pwm-mtk-disp.c > index c605013..1a9880d 100644 > --- a/drivers/pwm/pwm-mtk-disp.c > +++ b/drivers/pwm/pwm-mtk-disp.c > @@ -197,7 +197,7 @@ static void mtk_disp_pwm_get_state(struct pwm_chip *chip, > rate = clk_get_rate(mdp->clk_main); > con0 = readl(mdp->base + mdp->data->con0); > con1 = readl(mdp->base + mdp->data->con1); > - state->enabled = !!(con0 & BIT(0)); > + state->enabled = !!(readl(mdp->base + DISP_PWM_EN) & BIT(0)); I think you mean mdp->data->enable_mask here. Anyway, for the sake of human readability.... u32 clk_div, pwm_en, con0, con1; pwm_en = readl(mdp->base + DISP_PWM_EN); state->enabled = !!(pwm_en & mdp->data->enable_mask); Regards, Angelo > clk_div = FIELD_GET(PWM_CLKDIV_MASK, con0); > period = FIELD_GET(PWM_PERIOD_MASK, con1); > /* >
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