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Message-ID: <20220926091503.199474-1-chenweilong@huawei.com>
Date: Mon, 26 Sep 2022 17:15:03 +0800
From: Weilong Chen <chenweilong@...wei.com>
To: <chenweilong@...wei.com>, <yangyicong@...ilicon.com>
CC: <linux-i2c@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: [PATCH next v3] i2c: hisi: Add support to get clock frequency from clock property
Support the driver to obtain clock information by clk_rate or
clock property. Find clock first, if not, fall back to clk_rate.
Signed-off-by: Weilong Chen <chenweilong@...wei.com>
Acked-by: Yicong Yang <yangyicong@...ilicon.com>
---
Change since v1:
- Ordered struct field to inverted triangle.
- Use devm_clk_get_optional_enabled().
- Use IS_ERR_OR_NULL.
Link: https://lore.kernel.org/lkml/20220921101540.352553-1-chenweilong@huawei.com/
Change since v2:
- Remove redundant blank line
Link: https://lore.kernel.org/all/20220923011417.78994-1-chenweilong@huawei.com/
drivers/i2c/busses/i2c-hisi.c | 15 +++++++++++----
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/i2c/busses/i2c-hisi.c b/drivers/i2c/busses/i2c-hisi.c
index 67031024217c..e4b0ebe54f6f 100644
--- a/drivers/i2c/busses/i2c-hisi.c
+++ b/drivers/i2c/busses/i2c-hisi.c
@@ -8,6 +8,7 @@
#include <linux/acpi.h>
#include <linux/bits.h>
#include <linux/bitfield.h>
+#include <linux/clk.h>
#include <linux/completion.h>
#include <linux/i2c.h>
#include <linux/interrupt.h>
@@ -90,6 +91,7 @@ struct hisi_i2c_controller {
struct i2c_adapter adapter;
void __iomem *iobase;
struct device *dev;
+ struct clk *clk;
int irq;
/* Intermediates for recording the transfer process */
@@ -456,10 +458,15 @@ static int hisi_i2c_probe(struct platform_device *pdev)
return ret;
}
- ret = device_property_read_u64(dev, "clk_rate", &clk_rate_hz);
- if (ret) {
- dev_err(dev, "failed to get clock frequency, ret = %d\n", ret);
- return ret;
+ ctlr->clk = devm_clk_get_optional_enabled(&pdev->dev, NULL);
+ if (IS_ERR_OR_NULL(ctlr->clk)) {
+ ret = device_property_read_u64(dev, "clk_rate", &clk_rate_hz);
+ if (ret) {
+ dev_err(dev, "failed to get clock frequency, ret = %d\n", ret);
+ return ret;
+ }
+ } else {
+ clk_rate_hz = clk_get_rate(ctlr->clk);
}
ctlr->clk_rate_khz = DIV_ROUND_UP_ULL(clk_rate_hz, HZ_PER_KHZ);
--
2.31.GIT
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