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Message-ID: <CAMZdPi_u75BVP9scBCV3OToGhmOgJ7df599-OYw9D6iXsdgdOg@mail.gmail.com>
Date:   Tue, 27 Sep 2022 12:04:59 +0200
From:   Loic Poulain <loic.poulain@...aro.org>
To:     Qiang Yu <quic_qianyu@...cinc.com>
Cc:     mani@...nel.org, quic_hemantk@...cinc.com, mhi@...ts.linux.dev,
        linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
        quic_cang@...cinc.com, mrana@...cinc.com
Subject: Re: [PATCH] bus: mhi: host: Use mhi_soc_reset() API in place of
 register write

On Tue, 27 Sept 2022 at 11:49, Qiang Yu <quic_qianyu@...cinc.com> wrote:
>
> Currently, a direct register write is used when ramdump collection
> in panic path occurs. Replace that with new mhi_soc_reset() API
> such that a controller defined reset() function is exercised if
> one is present and the regular SOC reset is done if it is not.
>
> Signed-off-by: Qiang Yu <quic_qianyu@...cinc.com>

Reviewed-by: Loic Poulain <loic.poulain@...aro.org>

> ---
>  drivers/bus/mhi/host/boot.c | 4 +---
>  1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/drivers/bus/mhi/host/boot.c b/drivers/bus/mhi/host/boot.c
> index 5bed8b51..79a0eec 100644
> --- a/drivers/bus/mhi/host/boot.c
> +++ b/drivers/bus/mhi/host/boot.c
> @@ -118,9 +118,7 @@ static int __mhi_download_rddm_in_panic(struct mhi_controller *mhi_cntrl)
>                         /* Hardware reset so force device to enter RDDM */
>                         dev_dbg(dev,
>                                 "Did not enter RDDM, do a host req reset\n");
> -                       mhi_write_reg(mhi_cntrl, mhi_cntrl->regs,
> -                                     MHI_SOC_RESET_REQ_OFFSET,
> -                                     MHI_SOC_RESET_REQ);
> +                       mhi_soc_reset(mhi_cntrl);
>                         udelay(delayus);
>                 }
>
> --
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
>

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