linux-kernel - Re: [PATCH v2 04/33] ARM: dts: qcom: sdx55: align TLMM pin configuration with DT schema

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Message-ID: <722c4f2a-e9a8-c6e8-d83a-e6b55e51ddcb@somainline.org>
Date:   Tue, 27 Sep 2022 15:10:56 +0200
From:   Konrad Dybcio <konrad.dybcio@...ainline.org>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Linus Walleij <linus.walleij@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Stephan Gerhold <stephan@...hold.net>,
        Shawn Guo <shawn.guo@...aro.org>,
        Vinod Koul <vkoul@...nel.org>,
        krishna Lanka <quic_vamslank@...cinc.com>,
        Sivaprakash Murugesan <sivaprak@...eaurora.org>,
        linux-arm-msm@...r.kernel.org, linux-gpio@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 04/33] ARM: dts: qcom: sdx55: align TLMM pin
 configuration with DT schema



On 26.09.2022 09:43, Krzysztof Kozlowski wrote:
> DT schema expects TLMM pin configuration nodes to be named with
> '-state' suffix and their optional children with '-pins' suffix.  Schema
> also requires 'function' property, so two nodes for the same gpio (mux
> and config) should be merged into one.
> 
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@...ainline.org>

Konrad
>  .../boot/dts/qcom-sdx55-telit-fn980-tlb.dts   | 45 +++++++------------
>  1 file changed, 15 insertions(+), 30 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts b/arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts
> index a4fa468a095f..ac8b4626ae9a 100644
> --- a/arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts
> +++ b/arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts
> @@ -282,40 +282,25 @@ &remoteproc_mpss {
>  };
>  
>  &tlmm {
> -	pcie_ep_clkreq_default: pcie_ep_clkreq_default {
> -		mux {
> -			pins = "gpio56";
> -			function = "pcie_clkreq";
> -		};
> -		config {
> -			pins = "gpio56";
> -			drive-strength = <2>;
> -			bias-disable;
> -		};
> +	pcie_ep_clkreq_default: pcie-ep-clkreq-default-state {
> +		pins = "gpio56";
> +		function = "pcie_clkreq";
> +		drive-strength = <2>;
> +		bias-disable;
>  	};
>  
> -	pcie_ep_perst_default: pcie_ep_perst_default {
> -		mux {
> -			pins = "gpio57";
> -			function = "gpio";
> -		};
> -		config {
> -			pins = "gpio57";
> -			drive-strength = <2>;
> -			bias-pull-down;
> -		};
> +	pcie_ep_perst_default: pcie-ep-perst-default-state {
> +		pins = "gpio57";
> +		function = "gpio";
> +		drive-strength = <2>;
> +		bias-pull-down;
>  	};
>  
> -	pcie_ep_wake_default: pcie_ep_wake_default {
> -		mux {
> -			pins = "gpio53";
> -			function = "gpio";
> -		};
> -		config {
> -			pins = "gpio53";
> -			drive-strength = <2>;
> -			bias-disable;
> -		};
> +	pcie_ep_wake_default: pcie-ep-wake-default-state {
> +		pins = "gpio53";
> +		function = "gpio";
> +		drive-strength = <2>;
> +		bias-disable;
>  	};
>  };
>