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Message-ID: <c4bcb0b6-e798-d3fb-3722-d27f76401d21@somainline.org>
Date: Tue, 27 Sep 2022 15:11:19 +0200
From: Konrad Dybcio <konrad.dybcio@...ainline.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Linus Walleij <linus.walleij@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Stephan Gerhold <stephan@...hold.net>,
Shawn Guo <shawn.guo@...aro.org>,
Vinod Koul <vkoul@...nel.org>,
krishna Lanka <quic_vamslank@...cinc.com>,
Sivaprakash Murugesan <sivaprak@...eaurora.org>,
linux-arm-msm@...r.kernel.org, linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 05/33] ARM: dts: qcom: msm8226: align TLMM pin
configuration with DT schema
On 26.09.2022 09:43, Krzysztof Kozlowski wrote:
> DT schema expects TLMM pin configuration nodes to be named with
> '-state' suffix and their optional children with '-pins' suffix.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@...ainline.org>
Konrad
> arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts | 6 +++---
> arch/arm/boot/dts/qcom-msm8226.dtsi | 24 ++++++++++-----------
> 2 files changed, 15 insertions(+), 15 deletions(-)
>
> diff --git a/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts b/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts
> index 193569f0ca5f..02bef5870526 100644
> --- a/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts
> +++ b/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts
> @@ -299,8 +299,8 @@ bluetooth_default_state: bluetooth-default-state {
> input-enable;
> };
>
> - touch_pins: touch {
> - irq {
> + touch_pins: touch-state {
> + irq-pins {
> pins = "gpio17";
> function = "gpio";
>
> @@ -309,7 +309,7 @@ irq {
> input-enable;
> };
>
> - reset {
> + reset-pins {
> pins = "gpio16";
> function = "gpio";
>
> diff --git a/arch/arm/boot/dts/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom-msm8226.dtsi
> index cf2d56929428..3b6e746a4af9 100644
> --- a/arch/arm/boot/dts/qcom-msm8226.dtsi
> +++ b/arch/arm/boot/dts/qcom-msm8226.dtsi
> @@ -354,35 +354,35 @@ tlmm: pinctrl@...10000 {
> #interrupt-cells = <2>;
> interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
>
> - blsp1_i2c1_pins: blsp1-i2c1 {
> + blsp1_i2c1_pins: blsp1-i2c1-state {
> pins = "gpio2", "gpio3";
> function = "blsp_i2c1";
> drive-strength = <2>;
> bias-disable;
> };
>
> - blsp1_i2c2_pins: blsp1-i2c2 {
> + blsp1_i2c2_pins: blsp1-i2c2-state {
> pins = "gpio6", "gpio7";
> function = "blsp_i2c2";
> drive-strength = <2>;
> bias-disable;
> };
>
> - blsp1_i2c3_pins: blsp1-i2c3 {
> + blsp1_i2c3_pins: blsp1-i2c3-state {
> pins = "gpio10", "gpio11";
> function = "blsp_i2c3";
> drive-strength = <2>;
> bias-disable;
> };
>
> - blsp1_i2c4_pins: blsp1-i2c4 {
> + blsp1_i2c4_pins: blsp1-i2c4-state {
> pins = "gpio14", "gpio15";
> function = "blsp_i2c4";
> drive-strength = <2>;
> bias-disable;
> };
>
> - blsp1_i2c5_pins: blsp1-i2c5 {
> + blsp1_i2c5_pins: blsp1-i2c5-state {
> pins = "gpio18", "gpio19";
> function = "blsp_i2c5";
> drive-strength = <2>;
> @@ -390,13 +390,13 @@ blsp1_i2c5_pins: blsp1-i2c5 {
> };
>
> sdhc1_default_state: sdhc1-default-state {
> - clk {
> + clk-pins {
> pins = "sdc1_clk";
> drive-strength = <10>;
> bias-disable;
> };
>
> - cmd-data {
> + cmd-data-pins {
> pins = "sdc1_cmd", "sdc1_data";
> drive-strength = <10>;
> bias-pull-up;
> @@ -404,13 +404,13 @@ cmd-data {
> };
>
> sdhc2_default_state: sdhc2-default-state {
> - clk {
> + clk-pins {
> pins = "sdc2_clk";
> drive-strength = <10>;
> bias-disable;
> };
>
> - cmd-data {
> + cmd-data-pins {
> pins = "sdc2_cmd", "sdc2_data";
> drive-strength = <10>;
> bias-pull-up;
> @@ -418,21 +418,21 @@ cmd-data {
> };
>
> sdhc3_default_state: sdhc3-default-state {
> - clk {
> + clk-pins {
> pins = "gpio44";
> function = "sdc3";
> drive-strength = <8>;
> bias-disable;
> };
>
> - cmd {
> + cmd-pins {
> pins = "gpio43";
> function = "sdc3";
> drive-strength = <8>;
> bias-pull-up;
> };
>
> - data {
> + data-pins {
> pins = "gpio39", "gpio40", "gpio41", "gpio42";
> function = "sdc3";
> drive-strength = <8>;
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