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Message-ID: <16abaac3-d73f-2d00-f785-a16ec32139f1@intel.com>
Date: Wed, 28 Sep 2022 15:16:42 -0700
From: "Chang S. Bae" <chang.seok.bae@...el.com>
To: Sean Christopherson <seanjc@...gle.com>
CC: <linux-kernel@...r.kernel.org>, <x86@...nel.org>,
<tglx@...utronix.de>, <mingo@...hat.com>, <bp@...en8.de>,
<dave.hansen@...ux.intel.com>, <hpa@...or.com>, <avagin@...il.com>
Subject: Re: [PATCH v2 4/4] x86/fpu: Correct the legacy state offset and size
information
On 9/28/2022 2:06 PM, Sean Christopherson wrote:
> On Thu, Sep 22, 2022, Chang S. Bae wrote:
>>
>> diff --git a/arch/x86/kernel/fpu/xstate.c b/arch/x86/kernel/fpu/xstate.c
>> index a3f7045d1f8e..ac2ec5d6e7e4 100644
>> --- a/arch/x86/kernel/fpu/xstate.c
>> +++ b/arch/x86/kernel/fpu/xstate.c
>> @@ -143,8 +143,13 @@ static unsigned int xfeature_get_offset(u64 xcomp_bv, int xfeature)
>> * offsets.
>> */
>> if (!cpu_feature_enabled(X86_FEATURE_XCOMPACTED) ||
>> - xfeature <= XFEATURE_SSE)
>> + xfeature <= XFEATURE_SSE) {
>> + if (xfeature <= XFEATURE_SSE)
>> + pr_warn("The legacy state (%d) is discontiguously located.\n",
>> + xfeature);
>
> pr_warn() here isn't warranted. copy_uabi_to_xstate() calls this with non-extended
> features,
I think patch1 makes changes not to call this for legacy features anymore.
> which is perfectly fine since it manually handles MXCSR. And that helper
> is directly reachable by userspace, i.e. userspace can spam the pr_warn().
I don't think I get your point. I assume that helper is
__raw_xsave_addr(). But then I'm missing how it can be directly reached
by userspace.
Thanks,
Chang
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