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Message-ID: <YzaHk0McD2bAm6PE@yilunxu-OptiPlex-7050>
Date: Fri, 30 Sep 2022 14:07:15 +0800
From: Xu Yilun <yilun.xu@...el.com>
To: matthew.gerlach@...ux.intel.com
Cc: hao.wu@...el.com, russell.h.weight@...el.com,
basheer.ahmed.muddebihal@...el.com, trix@...hat.com,
mdf@...nel.org, linux-fpga@...r.kernel.org,
linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org,
tianfei.zhang@...el.com, corbet@....net,
gregkh@...uxfoundation.org, linux-serial@...r.kernel.org,
jirislaby@...nel.org, geert+renesas@...der.be,
andriy.shevchenko@...ux.intel.com,
niklas.soderlund+renesas@...natech.se, phil.edworthy@...esas.com,
macro@...am.me.uk, johan@...nel.org, lukas@...ner.de,
kernel test robot <lkp@...el.com>
Subject: Re: [PATCH v2 6/6] tty: serial: 8250: add DFL bus driver for Altera
16550.
On 2022-09-23 at 05:17:45 -0700, matthew.gerlach@...ux.intel.com wrote:
> From: Matthew Gerlach <matthew.gerlach@...ux.intel.com>
>
> Add a Device Feature List (DFL) bus driver for the Altera
> 16550 implementation of UART.
>
> Signed-off-by: Matthew Gerlach <matthew.gerlach@...ux.intel.com>
> Reported-by: kernel test robot <lkp@...el.com>
> ---
> v2: clean up error messages
> alphabetize header files
> fix 'missing prototype' error by making function static
> tried to sort Makefile and Kconfig better
> ---
> drivers/tty/serial/8250/8250_dfl.c | 177 +++++++++++++++++++++++++++++
> drivers/tty/serial/8250/Kconfig | 9 ++
> drivers/tty/serial/8250/Makefile | 1 +
> include/linux/dfl.h | 7 ++
> 4 files changed, 194 insertions(+)
> create mode 100644 drivers/tty/serial/8250/8250_dfl.c
>
> diff --git a/drivers/tty/serial/8250/8250_dfl.c b/drivers/tty/serial/8250/8250_dfl.c
> new file mode 100644
> index 000000000000..539ca6138eda
> --- /dev/null
> +++ b/drivers/tty/serial/8250/8250_dfl.c
> @@ -0,0 +1,177 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Driver for FPGA UART
> + *
> + * Copyright (C) 2022 Intel Corporation, Inc.
> + *
> + * Authors:
> + * Ananda Ravuri <ananda.ravuri@...el.com>
> + * Matthew Gerlach <matthew.gerlach@...ux.intel.com>
> + */
> +
> +#include <linux/bitfield.h>
> +#include <linux/dfl.h>
> +#include <linux/io-64-nonatomic-lo-hi.h>
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/serial.h>
> +#include <linux/serial_8250.h>
> +
> +struct dfl_uart {
> + void __iomem *csr_base;
> + struct device *dev;
> + u64 uart_clk;
> + u64 fifo_len;
> + unsigned int fifo_size;
> + unsigned int reg_shift;
> + unsigned int line;
> +};
> +
> +static int feature_uart_walk(struct dfl_uart *dfluart, resource_size_t max)
> +{
> + void __iomem *param_base;
> + int off;
> + u64 v;
> +
> + v = readq(dfluart->csr_base + DFHv1_CSR_SIZE_GRP);
> +
> + if (!FIELD_GET(DFHv1_CSR_SIZE_GRP_HAS_PARAMS, v)) {
> + dev_err(dfluart->dev, "missing required DFH parameters\n");
> + return -EINVAL;
> + }
> +
> + param_base = dfluart->csr_base + DFHv1_PARAM_HDR;
> +
> + off = dfl_find_param(param_base, max, DFHv1_PARAM_ID_CLK_FRQ);
I think the parameters of dfl_find_param are too complicated to be used
outside dfl framework (It is OK for dfl internal use).
How about:
dfl_find_param(struct dfl_device *ddev, int param_id)
Thanks,
Yilun
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