linux-kernel - Re: [PATCH 3/3] arm64/kprobe: Optimize the performance of patching single-step slot

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Message-ID: <YzaltNF5PqYq4x4O@arm.com>
Date:   Fri, 30 Sep 2022 09:15:48 +0100
From:   Catalin Marinas <catalin.marinas@....com>
To:     "liaochang (A)" <liaochang1@...wei.com>
Cc:     will@...nel.org, guoren@...nel.org, paul.walmsley@...ive.com,
        palmer@...belt.com, aou@...s.berkeley.edu, mhiramat@...nel.org,
        rostedt@...dmis.org, maz@...nel.org, alexandru.elisei@....com,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-csky@...r.kernel.org, linux-riscv@...ts.infradead.org
Subject: Re: [PATCH 3/3] arm64/kprobe: Optimize the performance of patching
 single-step slot

On Fri, Sep 30, 2022 at 09:02:20AM +0800, liaochang (A) wrote:
> 
> 
> 在 2022/9/30 0:50, Catalin Marinas 写道:
> > On Tue, Sep 27, 2022 at 10:24:35AM +0800, Liao Chang wrote:
> >> Single-step slot would not be used until kprobe is enabled, that means
> >> no race condition occurs on it under SMP, hence it is safe to pacth ss
> >> slot without stopping machine.
> >>
> >> Since I and D caches are coherent within single-step slot from
> >> aarch64_insn_patch_text_nosync(), hence no need to do it again via
> >> flush_icache_range().
> >>
> >> Acked-by: Will Deacon <will@...nel.org>
> >> Acked-by: Masami Hiramatsu (Google) <mhiramat@...nel.org>
> >> Signed-off-by: Liao Chang <liaochang1@...wei.com>
> >> ---
> >>  arch/arm64/kernel/probes/kprobes.c | 27 +++++++++++++++++++++------
> >>  1 file changed, 21 insertions(+), 6 deletions(-)
> > 
> > What's your expectation with this series, should the arch maintainers
> > just pick the individual patches?
> 
> Yes, or should i split this series into individual patch?

No need to, I can pick the arm64 patch. If the other maintainers don't
merge the patches, you might want to post them again individually as to
avoid confusion.

-- 
Catalin