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Message-ID: <166453026954.401.8391072210080091414.tip-bot2@tip-bot2>
Date: Fri, 30 Sep 2022 09:31:09 -0000
From: "tip-bot2 for Ravi Bangoria" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Ravi Bangoria <ravi.bangoria@....com>,
"Peter Zijlstra (Intel)" <peterz@...radead.org>, x86@...nel.org,
linux-kernel@...r.kernel.org
Subject: [tip: perf/core] perf/x86/amd: Add IBS OP_DATA2 DataSrc bit definitions
The following commit has been merged into the perf/core branch of tip:
Commit-ID: 610c238041fbc682936d34132362a54a802600fe
Gitweb: https://git.kernel.org/tip/610c238041fbc682936d34132362a54a802600fe
Author: Ravi Bangoria <ravi.bangoria@....com>
AuthorDate: Wed, 28 Sep 2022 15:27:52 +05:30
Committer: Peter Zijlstra <peterz@...radead.org>
CommitterDate: Thu, 29 Sep 2022 12:20:54 +02:00
perf/x86/amd: Add IBS OP_DATA2 DataSrc bit definitions
IBS_OP_DATA2 DataSrc provides detail about location of the data
being accessed from by load ops. Define macros for legacy and
extended DataSrc values.
Signed-off-by: Ravi Bangoria <ravi.bangoria@....com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@...radead.org>
Link: https://lkml.kernel.org/r/20220928095805.596-3-ravi.bangoria@amd.com
---
arch/x86/include/asm/amd-ibs.h | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/x86/include/asm/amd-ibs.h b/arch/x86/include/asm/amd-ibs.h
index f3eb098..cb2a5e1 100644
--- a/arch/x86/include/asm/amd-ibs.h
+++ b/arch/x86/include/asm/amd-ibs.h
@@ -6,6 +6,22 @@
#include <asm/msr-index.h>
+/* IBS_OP_DATA2 DataSrc */
+#define IBS_DATA_SRC_LOC_CACHE 2
+#define IBS_DATA_SRC_DRAM 3
+#define IBS_DATA_SRC_REM_CACHE 4
+#define IBS_DATA_SRC_IO 7
+
+/* IBS_OP_DATA2 DataSrc Extension */
+#define IBS_DATA_SRC_EXT_LOC_CACHE 1
+#define IBS_DATA_SRC_EXT_NEAR_CCX_CACHE 2
+#define IBS_DATA_SRC_EXT_DRAM 3
+#define IBS_DATA_SRC_EXT_FAR_CCX_CACHE 5
+#define IBS_DATA_SRC_EXT_PMEM 6
+#define IBS_DATA_SRC_EXT_IO 7
+#define IBS_DATA_SRC_EXT_EXT_MEM 8
+#define IBS_DATA_SRC_EXT_PEER_AGENT_MEM 12
+
/*
* IBS Hardware MSRs
*/
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