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Message-ID: <20221006153946.7816-2-ravi.bangoria@amd.com>
Date: Thu, 6 Oct 2022 21:09:39 +0530
From: Ravi Bangoria <ravi.bangoria@....com>
To: <acme@...nel.org>, <peterz@...radead.org>
CC: <ravi.bangoria@....com>, <jolsa@...nel.org>, <namhyung@...nel.org>,
<eranian@...gle.com>, <irogers@...gle.com>, <jmario@...hat.com>,
<leo.yan@...aro.org>, <alisaidi@...zon.com>, <ak@...ux.intel.com>,
<kan.liang@...ux.intel.com>, <dave.hansen@...ux.intel.com>,
<hpa@...or.com>, <mingo@...hat.com>, <mark.rutland@....com>,
<alexander.shishkin@...ux.intel.com>, <tglx@...utronix.de>,
<bp@...en8.de>, <x86@...nel.org>,
<linux-perf-users@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<sandipan.das@....com>, <ananth.narayan@....com>,
<kim.phillips@....com>, <santosh.shukla@....com>
Subject: [PATCH v4 1/8] perf tool: Sync include/uapi/linux/perf_event.h header
Two new fields for mem_lvl_num has been introduced: PERF_MEM_LVLNUM_IO
and PERF_MEM_LVLNUM_CXL which are required to support perf mem/c2c on
AMD platform.
Signed-off-by: Ravi Bangoria <ravi.bangoria@....com>
Acked-by: Jiri Olsa <jolsa@...nel.org>
---
tools/include/uapi/linux/perf_event.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/tools/include/uapi/linux/perf_event.h b/tools/include/uapi/linux/perf_event.h
index 49cb2355efc0..ea6defacc1a7 100644
--- a/tools/include/uapi/linux/perf_event.h
+++ b/tools/include/uapi/linux/perf_event.h
@@ -1327,7 +1327,9 @@ union perf_mem_data_src {
#define PERF_MEM_LVLNUM_L2 0x02 /* L2 */
#define PERF_MEM_LVLNUM_L3 0x03 /* L3 */
#define PERF_MEM_LVLNUM_L4 0x04 /* L4 */
-/* 5-0xa available */
+/* 5-0x8 available */
+#define PERF_MEM_LVLNUM_CXL 0x09 /* CXL */
+#define PERF_MEM_LVLNUM_IO 0x0a /* I/O */
#define PERF_MEM_LVLNUM_ANY_CACHE 0x0b /* Any cache */
#define PERF_MEM_LVLNUM_LFB 0x0c /* LFB */
#define PERF_MEM_LVLNUM_RAM 0x0d /* RAM */
--
2.37.3
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