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Message-ID: <ad9f1515-a7ff-e8a5-bbc0-4f0278c08952@somainline.org>
Date:   Fri, 7 Oct 2022 21:36:36 +0200
From:   Konrad Dybcio <konrad.dybcio@...ainline.org>
To:     Neil Armstrong <neil.armstrong@...aro.org>,
        Andy Gross <agross@...nel.org>, Lee Jones <lee@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Linus Walleij <linus.walleij@...aro.org>,
        Mark Brown <broonie@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Liam Girdwood <lgirdwood@...il.com>
Cc:     linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH 2/6] arm: dts: qcom: mdm9615: fix pinctrl subnodes



On 6.10.2022 11:57, Neil Armstrong wrote:
> Fix the MDM9615 DT to the expected subnodes namings.
> 
> Signed-off-by: Neil Armstrong <neil.armstrong@...aro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@...ainline.org>

Konrad
>  .../boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts  |  8 ++++----
>  arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi         | 22 +++++++++++-----------
>  2 files changed, 15 insertions(+), 15 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts b/arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts
> index 4e53b3d70195..30a110984597 100644
> --- a/arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts
> +++ b/arch/arm/boot/dts/qcom-mdm9615-wp8548-mangoh-green.dts
> @@ -45,8 +45,8 @@ &msmgpio {
>  	 * - 42: IOT0_GPIO1 and SD Card Detect
>  	 */
>  
> -	gpioext1_pins: gpioext1_pins {
> -		pins {
> +	gpioext1_pins: gpioext1-state {
> +		gpioext1-pins {
>  			pins = "gpio2";
>  			function = "gpio";
>  			input-enable;
> @@ -54,8 +54,8 @@ pins {
>  		};
>  	};
>  
> -	sdc_cd_pins: sdc_cd_pins {
> -		pins {
> +	sdc_cd_pins: sdc-cd-state {
> +		sdc-cd-pins {
>  			pins = "gpio42";
>  			function = "gpio";
>  			drive-strength = <2>;
> diff --git a/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi b/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi
> index 2fe8693dc3cd..92c8003dac25 100644
> --- a/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi
> +++ b/arch/arm/boot/dts/qcom-mdm9615-wp8548.dtsi
> @@ -22,8 +22,8 @@ &msmgpio {
>  	pinctrl-0 = <&reset_out_pins>;
>  	pinctrl-names = "default";
>  
> -	gsbi3_pins: gsbi3_pins {
> -		mux {
> +	gsbi3_pins: gsbi3-state {
> +		gsbi3-pins {
>  			pins = "gpio8", "gpio9", "gpio10", "gpio11";
>  			function = "gsbi3";
>  			drive-strength = <8>;
> @@ -31,8 +31,8 @@ mux {
>  		};
>  	};
>  
> -	gsbi4_pins: gsbi4_pins {
> -		mux {
> +	gsbi4_pins: gsbi4-state {
> +		gsbi4-pins {
>  			pins = "gpio12", "gpio13", "gpio14", "gpio15";
>  			function = "gsbi4";
>  			drive-strength = <8>;
> @@ -40,15 +40,15 @@ mux {
>  		};
>  	};
>  
> -	gsbi5_i2c_pins: gsbi5_i2c_pins {
> -		pin16 {
> +	gsbi5_i2c_pins: gsbi5-i2c-state {
> +		sda-pins {
>  			pins = "gpio16";
>  			function = "gsbi5_i2c";
>  			drive-strength = <8>;
>  			bias-disable;
>  		};
>  
> -		pin17 {
> +		scl-pins {
>  			pins = "gpio17";
>  			function = "gsbi5_i2c";
>  			drive-strength = <2>;
> @@ -56,8 +56,8 @@ pin17 {
>  		};
>  	};
>  
> -	gsbi5_uart_pins: gsbi5_uart_pins {
> -		mux {
> +	gsbi5_uart_pins: gsbi5-uart-state {
> +		gsbi5-uart-pins {
>  			pins = "gpio18", "gpio19";
>  			function = "gsbi5_uart";
>  			drive-strength = <8>;
> @@ -65,8 +65,8 @@ mux {
>  		};
>  	};
>  
> -	reset_out_pins: reset_out_pins {
> -		pins {
> +	reset_out_pins: reset-out-state {
> +		reset-out-pins {
>  			pins = "gpio66";
>  			function = "gpio";
>  			drive-strength = <2>;
> 

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