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Message-ID: <c8c48b34-974d-7497-c44d-992d0c4116cb@somainline.org>
Date: Fri, 7 Oct 2022 21:39:34 +0200
From: Konrad Dybcio <konrad.dybcio@...ainline.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Linus Walleij <linus.walleij@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
linux-arm-msm@...r.kernel.org, linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/4] arm64: dts: qcom: sdm630: correct I2C8 pin functions
On 6.10.2022 12:41, Krzysztof Kozlowski wrote:
> The I2C8 pins are split into i2c8_a (GPIO30 and GPIO31) and i2c8_b
> (GPIO44 and GPIO52). Correct the name of function for I2C8 pins.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@...ainline.org>
Konrad
> arch/arm64/boot/dts/qcom/sdm630.dtsi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
> index bc7c341e793c..796c19b9b2eb 100644
> --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
> @@ -885,14 +885,14 @@ i2c7_sleep: i2c7-sleep {
>
> i2c8_default: i2c8-default {
> pins = "gpio30", "gpio31";
> - function = "blsp_i2c8";
> + function = "blsp_i2c8_a";
> drive-strength = <2>;
> bias-disable;
> };
>
> i2c8_sleep: i2c8-sleep {
> pins = "gpio30", "gpio31";
> - function = "blsp_i2c8";
> + function = "blsp_i2c8_a";
> drive-strength = <2>;
> bias-pull-up;
> };
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